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公开(公告)号:US10727326B2
公开(公告)日:2020-07-28
申请号:US15884773
申请日:2018-01-31
Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Inventor: Meng-Chia Lee , Ralph N. Wall , Mingjiao Liu , Shamsul Arefin Khan , Gordon M. Grivna
IPC: H01L29/739 , H01L29/06 , H01L29/66 , H01L29/423 , H01L29/08 , H01L29/40
Abstract: In a general aspect, an insulated gate bipolar transistor (IGBT) device can include an active region, an inactive region and a trench extending along a longitudinal axis in the active region. The IGBT can also include a first mesa defining a first sidewall of the trench and in parallel with the trench and a second mesa defining a second sidewall of the trench and in parallel with the trench. At least a portion of the first mesa can include an active segment of the IGBT device, and at least a portion of the second mesa can include an inactive segment of the IGBT device.
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公开(公告)号:US10177232B2
公开(公告)日:2019-01-08
申请号:US15657286
申请日:2017-07-24
Applicant: Semiconductor Components Industries, LLC
Inventor: Mohammed Tanvir Quddus , Mihir Mudholkar , Mingjiao Liu , Michael Thomason
IPC: H01L29/36 , H01L29/45 , H01L29/47 , H01L29/66 , H01L21/265 , H01L21/266 , H01L29/872
Abstract: A Schottky device includes a plurality of mesa structures where one or more of the mesa structures includes a doped region having a multi-concentration dopant profile. In accordance with an embodiment, the Schottky device is formed from a semiconductor material of a first conductivity type. Trenches having sidewalls and floors are formed in the semiconductor material to form a plurality of mesa structures. A doped region having a multi-concentration impurity profile is formed between two trenches, where the impurity materials of the doped region having the multi-concentration impurity profile are of a second conductivity type. A Schottky contact is formed to at least one of the mesa structures having the doped region with the multi-concentration impurity profile.
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公开(公告)号:US11056581B2
公开(公告)日:2021-07-06
申请号:US15884779
申请日:2018-01-31
Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Inventor: Mingjiao Liu , Shamsul Arefin Khan , Gordon M. Grivna , Meng-Chia Lee , Ralph N. Wall
IPC: H01L29/739 , H01L29/06 , H01L29/66 , H01L29/423 , H01L29/40
Abstract: In a general aspect, an insulated gate bipolar transistor (IGBT) device can include an active region, an inactive region and a trench extending along a longitudinal axis in the active region. The IGBT device can also include a first mesa defined by a first sidewall of the trench and in parallel with the trench and a second mesa defined by a second sidewall of the trench and in parallel with the trench. The first mesa can include at least one active segment of the IGBT device and the second mesa can include at least one inactive segment of the IGBT device.
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公开(公告)号:US09716151B2
公开(公告)日:2017-07-25
申请号:US14160273
申请日:2014-01-21
Applicant: Semiconductor Components Industries, LLC
Inventor: Mohammed Tanvir Quddus , Mihir Mudholkar , Mingjiao Liu , Michael Thomason
IPC: H01L29/872 , H01L29/36 , H01L29/66 , H01L21/265 , H01L21/266
CPC classification number: H01L29/36 , H01L21/2652 , H01L21/266 , H01L29/66143 , H01L29/8725
Abstract: A Schottky device includes a plurality of mesa structures where one or more of the mesa structures includes a doped region having a multi-concentration dopant profile. In accordance with an embodiment, the Schottky device is formed from a semiconductor material of a first conductivity type. Trenches having sidewalk and floors are formed in the semiconductor material to form a plurality of mesa structures. A doped region having a multi-concentration impurity profile is formed in at least one trench, where the impurity materials of the doped region having the multi-concentration impurity profile are of a second conductivity type. A Schottky contact is formed to at least one of the mesa structures having the dope region with the multi-concentration impurity profile.
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公开(公告)号:US20170025339A1
公开(公告)日:2017-01-26
申请号:US15207626
申请日:2016-07-12
Applicant: Semiconductor Components Industries, LLC
Inventor: Chun-Li Liu , Ali Salih , Balaji Padmanabhan , Mingjiao Liu
IPC: H01L23/495 , H01L25/18 , H01L23/00 , H01L23/14
CPC classification number: H01L23/49575 , H01L23/3735 , H01L23/4952 , H01L23/49524 , H01L23/49562 , H01L23/49861 , H01L24/48 , H01L24/49 , H01L24/73 , H01L25/18 , H01L29/16 , H01L29/2003 , H01L2224/37099 , H01L2224/40105 , H01L2224/40245 , H01L2224/48091 , H01L2224/48105 , H01L2224/48145 , H01L2224/48245 , H01L2224/49112 , H01L2224/49176 , H01L2224/49177 , H01L2224/73221 , H01L2924/00014 , H01L2924/1203 , H01L2924/1306 , H01L2224/45099 , H01L2224/05599 , H01L2924/00012 , H01L2224/85399
Abstract: A semiconductor component includes a support having a lead integrally formed thereto. An insulated metal substrate is mounted to a surface of the support and a semiconductor chip is mounted to the insulated metal substrate. A III-N based semiconductor chip is mounted to the insulated metal substrate, where the III-N based semiconductor chip has a gate bond pad, a drain bond pad, and a source bond pad. A silicon based semiconductor chip is mounted to the III-N based semiconductor chip. In accordance with an embodiment the silicon based semiconductor chip includes a device having a gate bond pad, a drain bond pad, and a source bond pad. The drain bond pad of the III-N based semiconductor chip may be bonded to the substrate or to a lead. In accordance with another embodiment, the silicon based semiconductor chip is a diode.
Abstract translation: 半导体部件包括具有与其一体形成的引线的支撑件。 绝缘金属基板安装在支撑体的表面上,半导体芯片安装在绝缘金属基板上。 基于III-N的半导体芯片安装到绝缘金属基板上,其中III-N基半导体芯片具有栅极焊盘,漏极接合焊盘和源极焊盘。 硅基半导体芯片安装在基于III-N的半导体芯片上。 根据实施例,硅基半导体芯片包括具有栅极接合焊盘,漏极接合焊盘和源极焊盘的器件。 III-N型半导体芯片的漏极接合焊盘可以结合到衬底或引线上。 根据另一个实施例,硅基半导体芯片是二极管。
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公开(公告)号:US20170025328A1
公开(公告)日:2017-01-26
申请号:US15202917
申请日:2016-07-06
Applicant: Semiconductor Components Industries, LLC
Inventor: Chun-Li Liu , Ali Salih , Mingjiao Liu
CPC classification number: H01L21/4853 , H01L21/52 , H01L23/492 , H01L23/49524 , H01L23/49562 , H01L23/49575 , H01L23/49844 , H01L23/49861 , H01L24/00 , H01L24/48 , H01L24/49 , H01L29/2003 , H01L2224/04042 , H01L2224/05553 , H01L2224/05554 , H01L2224/0603 , H01L2224/32145 , H01L2224/48091 , H01L2924/00014 , H01L2224/45099 , H01L2224/05599
Abstract: In accordance with an embodiment, a semiconductor component includes a support having a side in which a device receiving structure and an interconnect structure are formed and a side from which a plurality of leads extends. A semiconductor device having a control terminal and first and second current carrying terminals and configured from a III-N semiconductor material is mounted to the device receiving structure. The control terminal of the first electrical interconnect is coupled to a first lead by a first electrical interconnect. A second electrical interconnect is coupled between the first current carrying terminal of the semiconductor device and a second lead. The second current carrying terminal of the first semiconductor device is coupled to the device receiving structure or to the interconnect structure.
Abstract translation: 根据实施例,半导体部件包括具有其中形成器件接收结构和互连结构的一侧的支撑体以及多个引线从该侧延伸的一侧。 具有控制端子和第一和第二载流端子并由III-N半导体材料构成的半导体器件被安装到器件接收结构。 第一电互连的控制端通过第一电互连耦合到第一引线。 第二电互连耦合在半导体器件的第一载流端子和第二引线之间。 第一半导体器件的第二载流端子耦合到器件接收结构或互连结构。
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公开(公告)号:US11233158B2
公开(公告)日:2022-01-25
申请号:US16667631
申请日:2019-10-29
Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Inventor: Mingjiao Liu
IPC: H01L27/07 , H01L29/861 , H01L29/868 , H01L29/66 , H01L29/47
Abstract: A device includes a first doped semiconductor region and a second oppositely doped semiconductor region that are separated by an undoped or lightly-doped semiconductor drift region. The device further includes a first electrode structure making an ohmic contact with the first doped semiconductor region, and a second electrode structure making a universal contact with the second doped semiconductor region. The universal contact of the second electrode structure allows flow of both electrons and holes into, and out of, the device.
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公开(公告)号:US10163764B2
公开(公告)日:2018-12-25
申请号:US15690773
申请日:2017-08-30
Applicant: Semiconductor Components Industries, LLC
Inventor: Chun-Li Liu , Ali Salih , Balaji Padmanabhan , Mingjiao Liu
IPC: H01L23/495 , H01L25/18 , H01L23/00 , H01L23/498 , H01L29/20 , H01L29/16 , H01L23/373
Abstract: A semiconductor component includes a support having a lead integrally formed thereto. An insulated metal substrate is mounted to a surface of the support and a semiconductor chip is mounted to the insulated metal substrate. A III-N based semiconductor chip is mounted to the insulated metal substrate, where the III-N based semiconductor chip has a gate bond pad, a drain bond pad, and a source bond pad. A silicon based semiconductor chip is mounted to the III-N based semiconductor chip. In accordance with an embodiment the silicon based semiconductor chip includes a device having a gate bond pad, a drain bond pad, and a source bond pad. The drain bond pad of the III-N based semiconductor chip may be bonded to the substrate or to a lead. In accordance with another embodiment, the silicon based semiconductor chip is a diode.
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公开(公告)号:US20180005927A1
公开(公告)日:2018-01-04
申请号:US15690773
申请日:2017-08-30
Applicant: Semiconductor Components Industries, LLC
Inventor: Chun-Li Liu , Ali Salih , Balaji Padmanabhan , Mingjiao Liu
IPC: H01L23/495 , H01L23/00 , H01L23/498 , H01L25/18 , H01L23/373 , H01L29/20 , H01L29/16
CPC classification number: H01L23/49575 , H01L23/3735 , H01L23/4952 , H01L23/49524 , H01L23/49562 , H01L23/49861 , H01L24/48 , H01L24/49 , H01L24/73 , H01L25/18 , H01L29/16 , H01L29/2003 , H01L2224/32145 , H01L2224/37099 , H01L2224/40105 , H01L2224/40245 , H01L2224/48091 , H01L2224/48105 , H01L2224/48145 , H01L2224/48245 , H01L2224/49112 , H01L2224/49176 , H01L2224/49177 , H01L2224/73221 , H01L2924/00014 , H01L2924/1203 , H01L2924/1306 , H01L2224/45099 , H01L2224/05599 , H01L2924/00012 , H01L2224/85399
Abstract: A semiconductor component includes a support having a lead integrally formed thereto. An insulated metal substrate is mounted to a surface of the support and a semiconductor chip is mounted to the insulated metal substrate. A III-N based semiconductor chip is mounted to the insulated metal substrate, where the III-N based semiconductor chip has a gate bond pad, a drain bond pad, and a source bond pad. A silicon based semiconductor chip is mounted to the III-N based semiconductor chip. In accordance with an embodiment the silicon based semiconductor chip includes a device having a gate bond pad, a drain bond pad, and a source bond pad. The drain bond pad of the III-N based semiconductor chip may be bonded to the substrate or to a lead. In accordance with another embodiment, the silicon based semiconductor chip is a diode.
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公开(公告)号:US20170323947A1
公开(公告)日:2017-11-09
申请号:US15657286
申请日:2017-07-24
Applicant: Semiconductor Components Industries, LLC
Inventor: Mohammed Tanvir Quddus , Mihir Mudholkar , Mingjiao Liu , Michael Thomason
IPC: H01L29/36 , H01L29/872 , H01L29/66 , H01L21/265 , H01L21/266
CPC classification number: H01L29/36 , H01L21/2652 , H01L21/266 , H01L29/456 , H01L29/47 , H01L29/66143 , H01L29/8725
Abstract: A Schottky device includes a plurality of mesa structures where one or more of the mesa structures includes a doped region having a multi-concentration dopant profile. In accordance with an embodiment, the Schottky device is formed from a semiconductor material of a first conductivity type. Trenches having sidewalls and floors are formed in the semiconductor material to form a plurality of mesa structures. A doped region having a multi-concentration impurity profile is formed in at least one trench, where the impurity materials of the doped region having the multi-concentration impurity profile are of a second conductivity type. A Schottky contact is formed to at least one of the mesa structures having the dope region with the multi-concentration impurity profile.
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