Semiconductor devices
    2.
    发明授权

    公开(公告)号:US10475898B2

    公开(公告)日:2019-11-12

    申请号:US15938716

    申请日:2018-03-28

    Abstract: A semiconductor device includes first semiconductor patterns vertically stacked on a substrate and vertically spaced apart from each other, and a first gate electrode on the first semiconductor patterns. The first gate electrode comprises a first work function metal pattern on a top surface, a bottom surface, and sidewalls of respective ones of the first semiconductor patterns, a barrier pattern on the first work function metal pattern, and a first electrode pattern on the barrier pattern. The first gate electrode has a first part between adjacent ones of the first semiconductor patterns. The barrier pattern comprises a silicon-containing metal nitride layer. The barrier pattern and the first electrode pattern are spaced apart from the first part.

    MULTIPLE DISPLAY DEVICE AND METHOD OF OPERATING THE SAME

    公开(公告)号:US20170262295A1

    公开(公告)日:2017-09-14

    申请号:US15458896

    申请日:2017-03-14

    Abstract: A multiple display device with a number of display areas, and a method of operating the device are provided. The method includes: executing a first application, and displaying the first user interface on the first image-display area; displaying text or icons related to the second application on the third image-display area; receiving a first user input for selecting an item or action via the first image-display area; receiving, after receiving the first user input, a second user input for selecting the text or the icon via the third image-display area; and displaying the second user interface on the second image-display area, in response to the second user input, and processing the item or action, using the second application. Various embodiments are provided.

    Semiconductor device having channel layers spaced apart in vertical direction

    公开(公告)号:US12100736B2

    公开(公告)日:2024-09-24

    申请号:US17513262

    申请日:2021-10-28

    CPC classification number: H01L29/1033 H01L29/0847

    Abstract: A semiconductor device includes a first active region on a substrate, channel layers disposed on the first active region to be spaced apart from each other in a vertical direction, a first gate structure disposed on the first active region and surrounding each channel layer, and a first source/drain region on the first active region on at least one side of the first gate structure. The channel layers include first to third channel layers. The first gate structure includes a first gate electrode and a first gate dielectric layer. The first gate dielectric layer includes first to third portions surrounding the first to third channel layers, respectively. The second portion has a thickness greater than a thickness of the first portion, and the third portion has a thickness greater than the thickness of the second portion.

    SEMICONDUCTOR DEVICE
    6.
    发明公开

    公开(公告)号:US20230402523A1

    公开(公告)日:2023-12-14

    申请号:US18103897

    申请日:2023-01-31

    CPC classification number: H01L29/42392 H01L29/775 H01L29/0673 H01L27/088

    Abstract: A semiconductor device includes first and second active patterns respectively provided on a first and second PMOSFET regions of a substrate, a first channel pattern on the first active pattern, the first channel pattern including first semiconductor patterns stacked and spaced apart from each other, a second channel pattern on the second active pattern, the second channel pattern including second semiconductor patterns stacked and spaced apart from each other, a first gate electrode on the first channel pattern, and a second gate electrode on the second channel pattern. A first concentration of aluminum (Al) or silicon (Si) in an inner gate electrode of the first gate electrode is different from a second concentration of aluminum (Al) or silicon (Si) in an inner gate electrode of the second gate electrode.

    INTEGRATED CIRCUIT DEVICE
    9.
    发明公开

    公开(公告)号:US20240250135A1

    公开(公告)日:2024-07-25

    申请号:US18454112

    申请日:2023-08-23

    Abstract: An integrated circuit device includes an insulating structure, a source/drain region on the insulating structure, a pair of bottom semiconductor sheets being spaced apart from each other with the source/drain region therebetween in a first horizontal direction, a pair of channel regions spaced apart from the insulating structure with the bottom semiconductor sheets therebetween, a pair of gate lines respectively extending on the pair of channel regions on the bottom semiconductor sheets and extending longitudinally in a second horizontal direction perpendicular to the first horizontal direction, and a backside contact structure extending through the insulating structure to contact a bottom surface of the source/drain region, the backside contact structure including a first contact portion that has a width in the first horizontal direction increasing toward the source/drain region and a second contact portion that has a width in the first horizontal direction decreasing toward the source/drain region.

Patent Agency Ranking