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1.
公开(公告)号:US20230402120A1
公开(公告)日:2023-12-14
申请号:US18132472
申请日:2023-04-10
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: KYUNGDUK LEE , Ho-Sung Ahn , Youn-Soo Cheon
CPC classification number: G11C29/022 , G11C29/52
Abstract: A data storage device including: a memory device including a plurality of memory blocks; and a memory controller configured to control the memory device, wherein the plurality of memory blocks are connected with row lines, wherein the row lines include word lines, wherein the memory controller is further configured to: check whether a resistive defect occurs at the row lines except for the word lines; and set a program operation time of a memory block corresponding to a row line, at which the resistive defect occurs, to be longer than a program operation time of the other memory blocks.
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2.
公开(公告)号:US11127456B2
公开(公告)日:2021-09-21
申请号:US16746413
申请日:2020-01-17
Applicant: Samsung Electronics Co., Ltd.
Inventor: Ho-Sung Ahn , Youn-Soo Cheon
Abstract: Provided herein are a nonvolatile memory device and a method of programming the same. The nonvolatile memory device includes a memory cell array including a plurality of word lines having a first word line and a plurality of memory cells connected to the first word line. The plurality of memory cells includes a plurality of monitoring cells and a plurality of data cells each data cell configured to store N-bit data, N being a natural number. The nonvolatile memory device is configured to perform a first program on the plurality of data cells and a detection program different from the first program on the one or more monitoring cells after performing the first program.
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公开(公告)号:US20240420794A1
公开(公告)日:2024-12-19
申请号:US18624904
申请日:2024-04-02
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Youhwan Kim , Sewoong Lee , Haedong No , Ho-Sung Ahn , Youn-Soo Cheon
Abstract: A non-volatile memory device comprises a memory cell array comprising a plurality of memory cell blocks; and an address decoder connected to the memory cell array through a plurality of word lines and configured to apply a read pass voltage to unselected word lines of a selected memory cell block among the plurality of memory cell blocks and apply the read pass voltages of different levels to different memory cell blocks among the plurality of memory cell blocks.
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4.
公开(公告)号:US20240071449A1
公开(公告)日:2024-02-29
申请号:US18322725
申请日:2023-05-24
Applicant: Samsung Electronics Co., Ltd.
Inventor: You Hwan Kim , Kyung Duk Lee , Ho-Sung Ahn , Youn-Soo Cheon
CPC classification number: G11C7/24 , G11C7/1087 , G11C7/1096
Abstract: A storage device, a non-volatile memory device, and a method of operating the non-volatile memory device are provided. The storage device includes a storage controller configured to send a command and program data including a pattern of one or more bits, a non-volatile memory device configured to receive the command and the program data, and a pattern monitoring circuit configured to monitor a pattern of the program data sent from the storage controller. The pattern monitoring circuit is configured to send an abnormal status check bit to the storage controller when the program data includes repeated patterns that are repeated a preset number of times or more, and the storage controller is configured to resend the program data to the non-volatile memory device in response to receiving the abnormal status check bit.
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公开(公告)号:US20250014658A1
公开(公告)日:2025-01-09
申请号:US18598988
申请日:2024-03-07
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Youhwan Kim , Kyungduk Lee , Suyong Jang , Hankyu Ko , Ho-Sung Ahn
Abstract: The present disclosure relates to storage devices. An example storage device includes a nonvolatile memory device that includes a plurality of memory blocks, and a memory controller that controls the nonvolatile memory device. The memory controller performs a soft erase operation on a first memory block among the plurality of memory blocks, measures a first cell count by applying a first reference voltage to a plurality of first memory cells selected in advance from a plurality of memory cells of the first memory block after performing the soft erase operation, generates a first health index associated with a retention characteristic of the first memory block based on the first cell count, and performs a reliability management operation on the first memory block based on the first health index.
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6.
公开(公告)号:US11699485B2
公开(公告)日:2023-07-11
申请号:US17408414
申请日:2021-08-21
Applicant: Samsung Electronics Co., Ltd.
Inventor: Ho-Sung Ahn , Youn-Soo Cheon
CPC classification number: G11C11/5628 , G06F3/0604 , G06F3/0659 , G06F3/0673 , G11C11/5635 , G11C11/5671 , G11C16/0483 , G11C16/10 , G11C16/14 , G11C16/30
Abstract: Provided herein are a nonvolatile memory device and a method of programming the same. The nonvolatile memory device includes a memory cell array including a plurality of word lines having a first word line and a plurality of memory cells connected to the first word line. The plurality of memory cells includes a plurality of monitoring cells and a plurality of data cells each data cell configured to store N-bit data, N being a natural number. The nonvolatile memory device is configured to perform a first program on the plurality of data cells and a detection program different from the first program on the one or more monitoring cells after performing the first program.
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