NON-VOLATILE MEMORY
    3.
    发明申请

    公开(公告)号:US20240420794A1

    公开(公告)日:2024-12-19

    申请号:US18624904

    申请日:2024-04-02

    Abstract: A non-volatile memory device comprises a memory cell array comprising a plurality of memory cell blocks; and an address decoder connected to the memory cell array through a plurality of word lines and configured to apply a read pass voltage to unselected word lines of a selected memory cell block among the plurality of memory cell blocks and apply the read pass voltages of different levels to different memory cell blocks among the plurality of memory cell blocks.

    STORAGE DEVICE, NON-VOLATILE MEMORY DEVICE, AND METHOD OF OPERATING THE NON-VOLATILE MEMORY DEVICE

    公开(公告)号:US20240071449A1

    公开(公告)日:2024-02-29

    申请号:US18322725

    申请日:2023-05-24

    CPC classification number: G11C7/24 G11C7/1087 G11C7/1096

    Abstract: A storage device, a non-volatile memory device, and a method of operating the non-volatile memory device are provided. The storage device includes a storage controller configured to send a command and program data including a pattern of one or more bits, a non-volatile memory device configured to receive the command and the program data, and a pattern monitoring circuit configured to monitor a pattern of the program data sent from the storage controller. The pattern monitoring circuit is configured to send an abnormal status check bit to the storage controller when the program data includes repeated patterns that are repeated a preset number of times or more, and the storage controller is configured to resend the program data to the non-volatile memory device in response to receiving the abnormal status check bit.

    STORAGE DEVICE AND OPERATING METHOD THEREOF

    公开(公告)号:US20250014658A1

    公开(公告)日:2025-01-09

    申请号:US18598988

    申请日:2024-03-07

    Abstract: The present disclosure relates to storage devices. An example storage device includes a nonvolatile memory device that includes a plurality of memory blocks, and a memory controller that controls the nonvolatile memory device. The memory controller performs a soft erase operation on a first memory block among the plurality of memory blocks, measures a first cell count by applying a first reference voltage to a plurality of first memory cells selected in advance from a plurality of memory cells of the first memory block after performing the soft erase operation, generates a first health index associated with a retention characteristic of the first memory block based on the first cell count, and performs a reliability management operation on the first memory block based on the first health index.

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