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公开(公告)号：US20240420794A1
公开(公告)日：2024-12-19
申请号：US18624904
申请日：2024-04-02
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Youhwan Kim , Sewoong Lee , Haedong No , Ho-Sung Ahn , Youn-Soo Cheon
Abstract: A non-volatile memory device comprises a memory cell array comprising a plurality of memory cell blocks; and an address decoder connected to the memory cell array through a plurality of word lines and configured to apply a read pass voltage to unselected word lines of a selected memory cell block among the plurality of memory cell blocks and apply the read pass voltages of different levels to different memory cell blocks among the plurality of memory cell blocks.
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公开(公告)号：US20250014658A1
公开(公告)日：2025-01-09
申请号：US18598988
申请日：2024-03-07
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Youhwan Kim , Kyungduk Lee , Suyong Jang , Hankyu Ko , Ho-Sung Ahn
Abstract: The present disclosure relates to storage devices. An example storage device includes a nonvolatile memory device that includes a plurality of memory blocks, and a memory controller that controls the nonvolatile memory device. The memory controller performs a soft erase operation on a first memory block among the plurality of memory blocks, measures a first cell count by applying a first reference voltage to a plurality of first memory cells selected in advance from a plurality of memory cells of the first memory block after performing the soft erase operation, generates a first health index associated with a retention characteristic of the first memory block based on the first cell count, and performs a reliability management operation on the first memory block based on the first health index.
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Patent Agency Ranking
公开(公告)号：US11727991B2
公开(公告)日：2023-08-15
申请号：US17378202
申请日：2021-07-16
Applicant: Samsung Electronics Co., Ltd.
Inventor： Youhwan Kim , Kyungduk Lee
CPC classification number: G11C16/08 , G06F12/0238 , G11C16/0483 , G11C16/26 , G11C16/32 , G06F2212/202
Abstract: An operating method of a storage device includes monitoring a temperature of a nonvolatile memory device including a plurality of memory blocks, receiving a first request from a host, in response to the first request, transmitting a first command to the nonvolatile memory device when a first memory block corresponding to the first request is exposed at a temperature of a threshold temperature or higher for a first time period that is equal to or greater than a threshold time period and a second command to the nonvolatile memory device when the first memory block is exposed at a temperature lower than the threshold temperature for the threshold time period, charging word lines of the first memory block with a driving voltage in response to the first command, and performing a first operation corresponding to the first request in response to the first command or the second command.
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公开(公告)号：US11869598B2
公开(公告)日：2024-01-09
申请号：US17579902
申请日：2022-01-20
Applicant: Samsung Electronics Co., Ltd.
Inventor： Jihwa Lee , Youhwan Kim , Kyungduk Lee , Hosung Ahn
CPC classification number: G11C16/16 , G11C16/08 , G11C16/105 , G11C16/28 , G11C16/30
Abstract: A storage device includes a controller configured to control a non-volatile memory device(s) having a plurality of memory blocks therein. The controller includes secure erase control logic configured to: (i) control secure erase operations on the plurality of memory blocks in response to a secure erase request received from a host, and (ii) set flags corresponding to the plurality of memory blocks such that a first flag corresponding to a first memory block, which has undergone at least two of the secure erase operations, has a first value. Adaptive control logic is provided, which is configured to change at least one operating condition associated with a write operation and/or read operation directed at the first memory block, in response to detecting that the first flag has the first value.
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公开(公告)号：US20220415404A1
公开(公告)日：2022-12-29
申请号：US17579902
申请日：2022-01-20
Applicant: Samsung Electronics Co., Ltd.
Inventor： Jihwa Lee , Youhwan Kim , Kyungduk Lee , Hosung Ahn
Abstract: A storage device includes a controller configured to control a non-volatile memory device(s) having a plurality of memory blocks therein. The controller includes secure erase control logic configured to: (i) control secure erase operations on the plurality of memory blocks in response to a secure erase request received from a host, and (ii) set flags corresponding to the plurality of memory blocks such that a first flag corresponding to a first memory block, which has undergone at least two of the secure erase operations, has a first value. Adaptive control logic is provided, which is configured to change at least one operating condition associated with a write operation and/or read operation directed at the first memory block, in response to detecting that the first flag has the first value.
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公开(公告)号：US11941271B2
公开(公告)日：2024-03-26
申请号：US17583713
申请日：2022-01-25
Applicant: Samsung Electronics Co., Ltd.
Inventor： Youhwan Kim , Jihwa Lee , Kyungduk Lee , Hosung Ahn
IPC: G06F3/06
CPC classification number: G06F3/064 , G06F3/0608 , G06F3/0679
Abstract: A storage device performing a secure erase and an operating method thereof are provided. The storage device may include a controller configured to control a non-volatile memory device including a plurality of blocks. The controller includes a secure erase control logic configured to control a secure erase operation on the plurality of blocks and perform a control operation in response to a secure erase request from a host with respect to a first block among the plurality of blocks such that the secure erase operation on the first block is skipped based on a result of determining at least one selected from a secure erase state and/or a deterioration state of the first block.
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公开(公告)号：US20220413701A1
公开(公告)日：2022-12-29
申请号：US17583713
申请日：2022-01-25
Applicant: Samsung Electronics Co., Ltd.
Inventor： Youhwan Kim , Jihwa Lee , Kyungduk Lee , Hosung Ahn
IPC: G06F3/06
Abstract: A storage device performing a secure erase and an operating method thereof are provided. The storage device may include a controller configured to control a non-volatile memory device including a plurality of blocks. The controller includes a secure erase control logic configured to control a secure erase operation on the plurality of blocks and perform a control operation in response to a secure erase request from a host with respect to a first block among the plurality of blocks such that the secure erase operation on the first block is skipped based on a result of determining at least one selected from a secure erase state and/or a deterioration state of the first block.
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