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公开(公告)号:US11868645B2
公开(公告)日:2024-01-09
申请号:US17240152
申请日:2021-04-26
Applicant: Samsung Electronics Co., Ltd.
Inventor: Hosung Ahn , Younsoo Cheon
IPC: G06F3/06
CPC classification number: G06F3/0655 , G06F3/0604 , G06F3/064 , G06F3/0679
Abstract: A method of operating a controller for controlling a memory device that comprises a plurality of memory cell blocks including outputting block address information based on reliability information for each of the memory cell blocks, providing a patrol read command to the memory device, and controlling the memory device to perform the patrol read operation in response to the patrol read command wherein the block address information comprises an order of the patrol read operation for the memory cell blocks based on the reliability information may be provided.
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公开(公告)号:US11941271B2
公开(公告)日:2024-03-26
申请号:US17583713
申请日:2022-01-25
Applicant: Samsung Electronics Co., Ltd.
Inventor: Youhwan Kim , Jihwa Lee , Kyungduk Lee , Hosung Ahn
IPC: G06F3/06
CPC classification number: G06F3/064 , G06F3/0608 , G06F3/0679
Abstract: A storage device performing a secure erase and an operating method thereof are provided. The storage device may include a controller configured to control a non-volatile memory device including a plurality of blocks. The controller includes a secure erase control logic configured to control a secure erase operation on the plurality of blocks and perform a control operation in response to a secure erase request from a host with respect to a first block among the plurality of blocks such that the secure erase operation on the first block is skipped based on a result of determining at least one selected from a secure erase state and/or a deterioration state of the first block.
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公开(公告)号:US20220413701A1
公开(公告)日:2022-12-29
申请号:US17583713
申请日:2022-01-25
Applicant: Samsung Electronics Co., Ltd.
Inventor: Youhwan Kim , Jihwa Lee , Kyungduk Lee , Hosung Ahn
IPC: G06F3/06
Abstract: A storage device performing a secure erase and an operating method thereof are provided. The storage device may include a controller configured to control a non-volatile memory device including a plurality of blocks. The controller includes a secure erase control logic configured to control a secure erase operation on the plurality of blocks and perform a control operation in response to a secure erase request from a host with respect to a first block among the plurality of blocks such that the secure erase operation on the first block is skipped based on a result of determining at least one selected from a secure erase state and/or a deterioration state of the first block.
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公开(公告)号:US11869598B2
公开(公告)日:2024-01-09
申请号:US17579902
申请日:2022-01-20
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jihwa Lee , Youhwan Kim , Kyungduk Lee , Hosung Ahn
CPC classification number: G11C16/16 , G11C16/08 , G11C16/105 , G11C16/28 , G11C16/30
Abstract: A storage device includes a controller configured to control a non-volatile memory device(s) having a plurality of memory blocks therein. The controller includes secure erase control logic configured to: (i) control secure erase operations on the plurality of memory blocks in response to a secure erase request received from a host, and (ii) set flags corresponding to the plurality of memory blocks such that a first flag corresponding to a first memory block, which has undergone at least two of the secure erase operations, has a first value. Adaptive control logic is provided, which is configured to change at least one operating condition associated with a write operation and/or read operation directed at the first memory block, in response to detecting that the first flag has the first value.
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公开(公告)号:US20220415404A1
公开(公告)日:2022-12-29
申请号:US17579902
申请日:2022-01-20
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jihwa Lee , Youhwan Kim , Kyungduk Lee , Hosung Ahn
Abstract: A storage device includes a controller configured to control a non-volatile memory device(s) having a plurality of memory blocks therein. The controller includes secure erase control logic configured to: (i) control secure erase operations on the plurality of memory blocks in response to a secure erase request received from a host, and (ii) set flags corresponding to the plurality of memory blocks such that a first flag corresponding to a first memory block, which has undergone at least two of the secure erase operations, has a first value. Adaptive control logic is provided, which is configured to change at least one operating condition associated with a write operation and/or read operation directed at the first memory block, in response to detecting that the first flag has the first value.
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