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    POWER CONTROL CONTROLLER, SEMICONDUCTOR DEVICE, AND SEMICONDUCTOR SYSTEM
    1.
    发明申请
    POWER CONTROL CONTROLLER, SEMICONDUCTOR DEVICE, AND SEMICONDUCTOR SYSTEM 审中-公开

    公开(公告)号：US20180032124A1

    公开(公告)日：2018-02-01

    申请号：US15496341

    申请日：2017-04-25

    Applicant: Renesas Electronics Corporation

    Inventor： Kazuki FUKUOKA

    IPC: G06F1/32 ,  H02M3/157 ,  H02M3/158

    CPC classification number: G06F1/3296 ,  G06F1/3206 ,  G06F1/324 ,  G06F1/3287 ,  H02M3/157 ,  H02M3/158 ,  Y02D10/126 ,  Y02D10/171 ,  Y02D10/172

    Abstract: An object of the present invention is to finely adjust a voltage for each processor core. A semiconductor system includes a semiconductor device and a power supply device configured to supply a fixed voltage to a supply voltage line. The semiconductor device includes a plurality of power control controllers. Each of the plurality of power control controllers includes a processor core, a plurality of switch transistors connected in parallel between the supply voltage line and a control voltage line, the control voltage line supplying a power supply voltage to the processor core, an AD converter configured to convert a control voltage output from the control voltage line into a current voltage value, the current voltage value being a digital value, and a step-down controller configured to control the plurality of switch transistors in order to bring the converted current voltage value close to a target voltage value.

    SEMICONDUCTOR DEVICE, SEMICONDUCTOR SYSTEM, AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD
    2.
    发明申请
    SEMICONDUCTOR DEVICE, SEMICONDUCTOR SYSTEM, AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD 审中-公开

    公开(公告)号：US20190074829A1

    公开(公告)日：2019-03-07

    申请号：US16045016

    申请日：2018-07-25

    Applicant: RENESAS ELECTRONICS CORPORATION

    Inventor： Kazuki FUKUOKA ,  Toshifumi UEMURA ,  Yuko KITAJI

    IPC: H03K17/22 ,  G05F3/24

    Abstract: There is a need to provide a semiconductor device, a semiconductor system, and a semiconductor device manufacturing method capable of accurately monitoring a minimum operating voltage for a monitoring-targeted circuit. A monitor portion of a semiconductor system according to one embodiment includes a voltage monitor and a delay monitor. The voltage monitor is driven by power-supply voltage SVCC different from power-supply voltage VDD supplied to an internal circuit as a monitoring-targeted circuit and monitors power-supply voltage VDD. The delay monitor is driven by power-supply voltage VDD and monitors signal propagation time for a critical path in the internal circuit. The delay monitor is configured so that a largest on-resistance of on-resistances for a plurality of transistors configuring the delay monitor is smaller than a largest on-resistance of on-resistances for a plurality of transistors configuring the internal circuit.

    SEMICONDUCTOR APPARATUS, DEGRADATION VALUE DETERMINATION SYSTEM AND PROCESSING SYSTEM
    3.
    发明申请
    SEMICONDUCTOR APPARATUS, DEGRADATION VALUE DETERMINATION SYSTEM AND PROCESSING SYSTEM 审中-公开

    公开(公告)号：US20170141762A1

    公开(公告)日：2017-05-18

    申请号：US15349036

    申请日：2016-11-11

    Applicant: Renesas Electronics Corporation

    Inventor： Toshifumi UEMURA ,  Kazuki FUKUOKA

    IPC: H03K3/011 ,  G01R31/26 ,  H03K3/03

    CPC classification number: H03K3/011 ,  G01R31/2601 ,  G01R31/2856 ,  H01L22/34 ,  H03K3/0315 ,  H03L7/00

    Abstract: A semiconductor apparatus includes an operation oscillator 13, a reference oscillator 16, a first operation switch 11 connected in series with the operation oscillator 13 between a power supply potential VDD and a ground potential GND, a first reference switch 14 connected in series with the reference oscillator 16 between the power supply potential VDD and the ground potential GND, a second reference switch 15 connected in parallel with the reference oscillator 16 between the power supply potential VDD and the ground potential GND, an operation counter 26 configured to count the number of output pulses from the operation oscillator 13 in a measurement period, and a reference counter 25 configured to count the number of output pulses from the reference oscillator 16 in the measurement period.

    SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
    4.
    发明申请
    SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE 有权
    半导体集成电路设备

    公开(公告)号：US20130135036A1

    公开(公告)日：2013-05-30

    申请号：US13748663

    申请日：2013-01-24

    Applicant: RENESAS ELECTRONICS CORPORATION

    Inventor： Kazuki FUKUOKA ,  Yasuto IGARASHI ,  Ryo MORI ,  Yoshihiko YASU ,  Toshio SASAKI

    IPC: H03K5/00

    CPC classification number: H03K5/00 ,  H01L27/0203 ,  H01L27/0207 ,  H01L27/0928 ,  H01L27/11807 ,  H03K3/00 ,  H03K19/0016

    Abstract: Efficient reduction in power consumption is achieved by combinational implementation of a power cutoff circuit technique using power supply switch control and a DVFS technique for low power consumption. A power supply switch section fed with power supply voltage, a circuit block in which a power cutoff is performed by the power supply switch section, and a level shifter are formed in a DEEP-NWELL region formed over a semiconductor substrate. Another power supply switch section fed with another power supply voltage, a circuit block in which a power cutoff is performed by the power supply switch section, and a level shifter are formed in another DEEP-NWELL region formed over the semiconductor substrate. In this arrangement, there arises no possibility of short-circuiting between different power supplies via each DEEP-NWELL region formed over the semiconductor substrate.

    Abstract translation: 通过使用电源开关控制和DVFS技术组合实现断电电路技术实现功耗的有效降低，实现低功耗。 在半导体基板上形成的DEEP-NWELL区域中，形成供给电源电压的电源开关部，由电源开关部进行电源切断的电路块和电平移位器。 供给另一电源电压的另一个电源开关部分，由电源开关部分执行电源切断的电路块和电平移位器形成在形成在半导体衬底上的另一个DEEP-NWELL区域中。 在这种布置中，不存在通过半导体衬底上形成的每个DEEP-NWELL区域在不同电源之间短路的可能性。

    SEMICONDUCTOR DEVICE
    6.
    发明申请
    SEMICONDUCTOR DEVICE 审中-公开
    半导体器件

    公开(公告)号：US20170075404A1

    公开(公告)日：2017-03-16

    申请号：US15224380

    申请日：2016-07-29

    Applicant: Renesas Electronics Corporation

    Inventor： Yuko KITAJI ,  Kazuki FUKUOKA ,  Ryo MORI ,  Toshifumi UEMURA

    IPC: G06F1/32

    CPC classification number: G06F1/305 ,  G06F1/10 ,  G06F1/32 ,  G06F1/3237

    Abstract: There is provided a semiconductor device that can follow a fast voltage change such as a large voltage drop occurring at the time of rapid load fluctuation. The semiconductor device includes a voltage sensor which monitors a power supply voltage at a sampling speed higher than the assumed frequency of power supply voltage fluctuation and outputs a voltage code value, a voltage drop determination circuit which determines, from the voltage code value, that a voltage drop causing a malfunction of a system occurs, and outputs a clock stop signal, and a clock control circuit which controls clock stop, restart, and frequency change.

    Abstract translation: 提供了可以跟随快速电压变化的半导体器件，例如在快速负载波动时发生的大的电压降。 半导体装置包括：电压传感器，其以比假想电源电压波动的频率高的采样速度监视电源电压，并输出电压代码值;电压降判定电路，根据电压代码值确定： 产生导致系统故障的电压降，并输出时钟停止信号，以及控制时钟停止，重启和频率变化的时钟控制电路。

    SEMICONDUCTOR DEVICE
    7.
    发明申请
    SEMICONDUCTOR DEVICE 有权

    公开(公告)号：US20210365093A1

    公开(公告)日：2021-11-25

    申请号：US17319880

    申请日：2021-05-13

    Applicant: RENESAS ELECTRONICS CORPORATION

    Inventor： Ryo MORI ,  Kazuki FUKUOKA ,  Kenichi SHIMADA

    IPC: G06F1/26 ,  G06F1/28

    Abstract: A semiconductor device includes: a plurality of cores configured to receive power from a power supply; a plurality of power switch circuits provided for each core and configured to control the power supplied to the corresponding cores; a compare circuit configured to receive power from the power supply and compare output data of the plurality of cores; and a core voltage monitor circuit configured to monitor a voltage of a node that connects the power supply and the compare circuit.

    SEMICONDUCTOR DEVICE
    9.
    发明申请
    SEMICONDUCTOR DEVICE 审中-公开
    半导体器件

    公开(公告)号：US20160064063A1

    公开(公告)日：2016-03-03

    申请号：US14817777

    申请日：2015-08-04

    Applicant: Renesas Electronics Corporation

    Inventor： Takao NOMURA ,  Ryo MORI ,  Kazuki FUKUOKA

    IPC: G11C11/406 ,  G11C11/4074

    CPC classification number: G11C11/40626 ,  G11C11/40618 ,  G11C11/4074 ,  G11C2211/4068 ,  H01L2224/16145 ,  H01L2924/181 ,  H01L2924/00012

    Abstract: A semiconductor device capable of controlling a memory while preventing the functional deterioration of the memory and reducing the power consumption of the semiconductor device is provided. The semiconductor device includes a first semiconductor chip (logic chip) and a second semiconductor chip (memory chip). The first semiconductor chip includes a plurality of temperature sensors disposed in mutually different places, and a memory controller that controls each of a plurality of memory areas provided in the second semiconductor chip based on output results of a respective one of the plurality of temperature sensors.

    Abstract translation: 提供一种能够在防止存储器的功能劣化并降低半导体器件的功耗的同时控制存储器的半导体器件。 半导体器件包括第一半导体芯片（逻辑芯片）和第二半导体芯片（存储芯片）。 第一半导体芯片包括设置在相互不同的位置的多个温度传感器，以及存储器控制器，其基于多个温度传感器中的相应一个的输出结果来控制设置在第二半导体芯片中的多个存储区域中的每一个。

    SEMICONDUCTOR APPARATUS AND CONTROL METHOD THEROF
    10.
    发明申请
    SEMICONDUCTOR APPARATUS AND CONTROL METHOD THEROF 审中-公开
    半导体装置及其控制方法

    公开(公告)号：US20150046729A1

    公开(公告)日：2015-02-12

    申请号：US14454543

    申请日：2014-08-07

    Applicant: RENESAS ELECTRONICS CORPORATION

    Inventor： Kazuki FUKUOKA ,  Kazuo OTSUGA

    IPC: G06F1/32 ,  G06F13/24

    CPC classification number: G06F13/24 ,  G06F1/20 ,  G06F1/206 ,  G06F1/3287 ,  Y02D10/171

    Abstract: First and second processing units execute a binary program. A temperature sensor measures a temperature of a first processing unit. A temperature detection unit outputs a first interrupt instruction when the temperature measured by the temperature sensor exceeds a first value. A bus exchanges data between the first and second processing units. In response to the first interrupt instruction, the control unit interrupts execution in the first processing unit, migrates first data that is necessary for resuming the execution of the binary program from the first processing unit to the second processing unit, and controls the second processing unit to resume the execution of the binary program in the second processing unit. A power control unit interrupts power supply to the first processing unit after the first data is migrated to the second processing unit.

    Abstract translation: 第一和第二处理单元执行二进制程序。 温度传感器测量第一处理单元的温度。 当由温度传感器测量的温度超过第一值时，温度检测单元输出第一中断指令。 总线在第一和第二处理单元之间交换数据。 响应于第一中断指令，控制单元中断第一处理单元中的执行，将从第一处理单元恢复执行二进制程序所必需的第一数据迁移到第二处理单元，并且控制第二处理单元 以恢复第二处理单元中的二进制程序的执行。 在第一数据迁移到第二处理单元之后，电源控制单元中断对第一处理单元的电力供应。

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