公开(公告)号：US20050121331A1

公开(公告)日：2005-06-09

申请号：US11002437

申请日：2004-12-03

申请人： Mitsuru Kinoshita ,  Tsugihiko Hirano ,  Katsunori Takahashi

发明人： Mitsuru Kinoshita ,  Tsugihiko Hirano ,  Katsunori Takahashi

IPC分类号： C25D7/12 ,  C25D3/56 ,  C25D17/10 ,  C25D17/12 ,  H01L21/50 ,  H01L21/60 ,  H01L23/31 ,  H01L23/495 ,  H01L23/50

CPC分类号： C25D3/56 ,  C25D17/10 ,  H01L23/3107 ,  H01L23/49582 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/97 ,  H01L2224/05554 ,  H01L2224/32014 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/48247 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/85201 ,  H01L2224/85205 ,  H01L2224/92247 ,  H01L2224/97 ,  H01L2924/00011 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01072 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/19043 ,  H01L2924/3025 ,  H01L2924/00014 ,  H01L2224/85 ,  H01L2224/83 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/01049

摘要： An electroplating method calls for immersing a body to be plated in a plating solution containing tin and bismuth to form a tin-bismuth alloy skin layer on surfaces of the body. The plating is carried out such that a solid tin metal and a solid bismuth metal placed in the plating solution are connected to an anode and the body to be plated is connected to a cathode of a power supply.

摘要翻译： 电镀方法要求将要镀覆的物体浸入含有锡和铋的镀液中，以在主体的表面上形成锡 - 铋合金表皮层。 进行电镀，使得放置在电镀液中的固体锡金属和固体铋金属连接到阳极，并且待电镀的主体连接到电源的阴极。

公开(公告)号：US07604727B2

公开(公告)日：2009-10-20

申请号：US12015545

申请日：2008-01-17

申请人： Mitsuru Kinoshita ,  Tsugihiko Hirano ,  Katsunori Takahashi

发明人： Mitsuru Kinoshita ,  Tsugihiko Hirano ,  Katsunori Takahashi

IPC分类号： H01L21/288

CPC分类号： C25D3/56 ,  C25D17/10 ,  H01L23/3107 ,  H01L23/49582 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/97 ,  H01L2224/05554 ,  H01L2224/32014 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/48247 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/85201 ,  H01L2224/85205 ,  H01L2224/92247 ,  H01L2224/97 ,  H01L2924/00011 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01072 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/19043 ,  H01L2924/3025 ,  H01L2924/00014 ,  H01L2224/85 ,  H01L2224/83 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/01049

摘要： An electroplating method calls for immersing a body to be plated in a plating solution containing tin and bismuth to form a tin-bismuth alloy skin layer on surfaces of the body. The plating is carried out such that a solid tin metal and a solid bismuth metal placed in the plating solution are connected to an anode and the body to be plated is connected to a cathode of a power supply.

摘要翻译： 电镀方法要求将要镀覆的物体浸入含有锡和铋的镀液中，以在主体的表面上形成锡 - 铋合金表皮层。 进行电镀，使得放置在电镀液中的固体锡金属和固体铋金属连接到阳极，并且待电镀的主体连接到电源的阴极。

公开(公告)号：US07323097B2

公开(公告)日：2008-01-29

申请号：US11002437

申请日：2004-12-03

申请人： Mitsuru Kinoshita ,  Tsugihiko Hirano ,  Katsunori Takahashi

发明人： Mitsuru Kinoshita ,  Tsugihiko Hirano ,  Katsunori Takahashi

IPC分类号： C25D3/60 ,  C25D5/50 ,  C25D5/02 ,  C25D7/06 ,  C25D7/00

CPC分类号： C25D3/56 ,  C25D17/10 ,  H01L23/3107 ,  H01L23/49582 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/97 ,  H01L2224/05554 ,  H01L2224/32014 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/48247 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/85201 ,  H01L2224/85205 ,  H01L2224/92247 ,  H01L2224/97 ,  H01L2924/00011 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01072 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/19043 ,  H01L2924/3025 ,  H01L2924/00014 ,  H01L2224/85 ,  H01L2224/83 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/01049

摘要： An electroplating method calls for immersing a body to be plated in a plating solution containing tin and bismuth to form a tin-bismuth alloy skin layer on surfaces of the body. The plating is carried out such that a solid tin metal and a solid bismuth metal placed in the plating solution are connected to an anode and the body to be plated is connected to a cathode of a power supply.

摘要翻译： 电镀方法要求将要镀覆的物体浸入含有锡和铋的镀液中，以在主体的表面上形成锡 - 铋合金表皮层。 进行电镀，使得放置在电镀液中的固体锡金属和固体铋金属连接到阳极，并且待电镀的主体连接到电源的阴极。

公开(公告)号：US20080132005A1

公开(公告)日：2008-06-05

申请号：US12015545

申请日：2008-01-17

申请人： Mitsuru Kinoshita ,  Tsugihiko Hirano ,  Katsunori Takahashi

发明人： Mitsuru Kinoshita ,  Tsugihiko Hirano ,  Katsunori Takahashi

IPC分类号： H01L21/56

CPC分类号： C25D3/56 ,  C25D17/10 ,  H01L23/3107 ,  H01L23/49582 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/97 ,  H01L2224/05554 ,  H01L2224/32014 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/48247 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/85201 ,  H01L2224/85205 ,  H01L2224/92247 ,  H01L2224/97 ,  H01L2924/00011 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01072 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/19043 ,  H01L2924/3025 ,  H01L2924/00014 ,  H01L2224/85 ,  H01L2224/83 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/01049

摘要： An electroplating method calls for immersing a body to be plated in a plating solution containing tin and bismuth to form a tin-bismuth alloy skin layer on surfaces of the body. The plating is carried out such that a solid tin metal and a solid bismuth metal placed in the plating solution are connected to an anode and the body to be plated is connected to a cathode of a power supply.

摘要翻译： 电镀方法要求将要镀覆的物体浸入含有锡和铋的镀液中，以在主体的表面上形成锡 - 铋合金表皮层。 进行电镀，使得放置在电镀液中的固体锡金属和固体铋金属连接到阳极，并且待电镀的主体连接到电源的阴极。

公开(公告)号：US06909179B2

公开(公告)日：2005-06-21

申请号：US09904839

申请日：2001-07-16

申请人： Shigeki Tanaka ,  Atsushi Fujisawa ,  Souichi Nagano ,  Tsugihiko Hirano ,  Ryouichi Oota ,  Takafumi Konno ,  Kenichi Tatebe ,  Toshiaki Okamoto

发明人： Shigeki Tanaka ,  Atsushi Fujisawa ,  Souichi Nagano ,  Tsugihiko Hirano ,  Ryouichi Oota ,  Takafumi Konno ,  Kenichi Tatebe ,  Toshiaki Okamoto

IPC分类号： H01L23/433 ,  H01L23/495 ,  H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L24/85 ,  H01L23/4334 ,  H01L23/49541 ,  H01L24/06 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48624 ,  H01L2224/48647 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/85424 ,  H01L2224/85447 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/07802 ,  H01L2924/10162 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/20752 ,  H01L2924/20753 ,  H01L2224/78 ,  H01L2924/00 ,  H01L2924/00012

摘要： A semiconductor device includes a substrate, a semiconductor chip mounted on one surface of the substrate, wherein the semiconductor chip has an integrated circuit and bonding pads formed on a main surface thereof. The main surface of the semiconductor chip has a quadrilateral shape with the bonding pads being disposed along four sides of the main surface. A plurality of conductors is disposed on the one surface of the substrate so as to surround the semiconductor chip along four sides thereof and a plurality of bonding wires electrically connect the bonding pads with tips of the conductors, respectively. A resin body seals the semiconductor chip, the conductors and the plurality of bonding wires. A pitch between adjacent bonding pads increases in a direction toward four corners defined by the four sides of the main surface of the semiconductor chip.

摘要翻译： 半导体器件包括衬底，安装在衬底的一个表面上的半导体芯片，其中半导体芯片具有形成在其主表面上的集成电路和焊盘。 半导体芯片的主表面具有四边形形状，其中焊盘沿着主表面的四边设置。 多个导体设置在基板的一个表面上，以便沿其四个侧面包围半导体芯片，并且多个接合线分别将接合焊盘与导体的尖端电连接。 树脂体密封半导体芯片，导体和多根接合线。 相邻接合焊盘之间的间距在朝向由半导体芯片的主表面的四个边限定的四个角的方向上增加。

公开(公告)号：US06838767B2

公开(公告)日：2005-01-04

申请号：US10162613

申请日：2002-06-06

申请人： Tsugihiko Hirano ,  Hidemi Ozawa

发明人： Tsugihiko Hirano ,  Hidemi Ozawa

IPC分类号： H01L23/12 ,  H01L21/60 ,  H01L23/31 ,  H01L23/498 ,  H01L23/48

CPC分类号： H01L24/32 ,  H01L23/3121 ,  H01L23/49838 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2224/05554 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48095 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/73265 ,  H01L2224/85201 ,  H01L2224/85205 ,  H01L2224/92247 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/0132 ,  H01L2924/10162 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1517 ,  H01L2924/15183 ,  H01L2924/15311 ,  H01L2924/1579 ,  H01L2924/181 ,  H01L2924/19107 ,  H01L2924/30107 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/01082 ,  H01L2224/13111 ,  H01L2924/0665 ,  H01L2924/0695

摘要： Provided is a technique which permits production of a semiconductor device having, integrated therein, a semiconductor chip smaller in external size than an ordinary semiconductor chip without lowering the production yield. The semiconductor device according to the present invention comprises a substrate having a square-shaped plane and having an interconnection formed on a first surface (chip mounting surface) of first and second opposite surfaces; a semiconductor chip which is mounted on the first surface of said substrate and has an electrode formed on a first surface (circuit forming surface) of first and second opposite surfaces of the semiconductor chip, and a conductive wire for electrically connecting the electrode of said semiconductor chip with the interconnection of said substrate, said interconnection having a plurality of connecting pads arranged from the peripheral side toward the inner side of said substrate.

公开(公告)号：US06551862B2

公开(公告)日：2003-04-22

申请号：US09978724

申请日：2001-10-18

申请人： Riyouichi Oota ,  Tsugihiko Hirano ,  Atsushi Fujisawa ,  Takafumi Konno

发明人： Riyouichi Oota ,  Tsugihiko Hirano ,  Atsushi Fujisawa ,  Takafumi Konno

IPC分类号： H01L2150

CPC分类号： H01L21/6836 ,  H01L21/565 ,  H01L23/16 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/564 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/83 ,  H01L2221/68327 ,  H01L2224/274 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/83191 ,  H01L2224/8385 ,  H01L2224/92 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/07802 ,  H01L2924/14 ,  H01L2924/15151 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/3511 ,  H01L2924/00 ,  H01L2924/3512 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor device is disclosed, comprising a tape substrate which supports a semiconductor chip, an insulating adhesive layer disposed between the semiconductor chip and the tape substrate, an insulating sheet member laminated to the insulating adhesive layer and formed harder than the insulating adhesive layer, wires for connecting pads on the semiconductor chip with connecting terminals on the tape substrate, a sealing portion formed by sealing the semiconductor chip with resin, and plural solder balls provided on a back of the tape substrate. A die bonding layer for fixing the semiconductor chip thereto is composed of an insulating adhesive layer and the insulating sheet member laminated thereto. The die bonding layer is formed thick by such a multi-layer structure, whereby the resin balance of the surface and back of the semiconductor chip is improved to prevent warping of a package and improve the mounting temperature cyclicity and reflow characteristic.

公开(公告)号：US06472749B1

公开(公告)日：2002-10-29

申请号：US09495918

申请日：2000-02-02

申请人： Tsugihiko Hirano ,  Hidemi Ozawa

发明人： Tsugihiko Hirano ,  Hidemi Ozawa

IPC分类号： H01L2348

CPC分类号： H01L24/32 ,  H01L23/3121 ,  H01L23/49838 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2224/05554 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48095 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/73265 ,  H01L2224/85201 ,  H01L2224/85205 ,  H01L2224/92247 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/0132 ,  H01L2924/10162 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1517 ,  H01L2924/15183 ,  H01L2924/15311 ,  H01L2924/1579 ,  H01L2924/181 ,  H01L2924/19107 ,  H01L2924/30107 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/01082 ,  H01L2224/13111 ,  H01L2924/0665 ,  H01L2924/0695

摘要： Provided is a technique which permits production of a semiconductor device having, integrated therein, a semiconductor chip smaller in external size than an ordinary semiconductor chip without lowering the production yield. The semiconductor device according to the present invention comprises a substrate having a square-shaped plane and having an interconnection formed on a first surface (chip mounting surface) of first and second opposite surfaces; a semiconductor chip which is mounted on the first surface of said substrate and has an electrode formed on a first surface (circuit forming surface) of first and second opposite surfaces of the semiconductor chip, and a conductive wire for electrically connecting the electrode of said semiconductor chip with the interconnection of said substrate, said interconnection having a plurality of connecting pads arranged from the peripheral side toward the inner side of said substrate.

摘要翻译： 提供了一种技术，其允许制造其中集成有比普通半导体芯片小的外部尺寸的半导体芯片的半导体器件，而不降低生产成品率。 根据本发明的半导体器件包括具有方形平面并且具有形成在第一和第二相对表面的第一表面（芯片安装表面）上的互连的基板; 半导体芯片，其安装在所述基板的第一表面上，并且具有形成在所述半导体芯片的第一和第二相对表面的第一表面（电路形成表面）上的电极和用于将所述半导体的电极电连接的导线 芯片与所述基板的互连，所述互连具有从所述基板的外周侧朝向内侧布置的多个连接焊盘。

公开(公告)号：US06265762B1

公开(公告)日：2001-07-24

申请号：US08820228

申请日：1997-03-18

申请人： Shigeki Tanaka ,  Atsushi Fujisawa ,  Souichi Nagano ,  Tsugihiko Hirano ,  Ryouichi Oota ,  Takafumi Konno ,  Kenichi Tatebe ,  Toshiaki Okamoto

发明人： Shigeki Tanaka ,  Atsushi Fujisawa ,  Souichi Nagano ,  Tsugihiko Hirano ,  Ryouichi Oota ,  Takafumi Konno ,  Kenichi Tatebe ,  Toshiaki Okamoto

IPC分类号： H01L23495

CPC分类号： H01L24/06 ,  H01L23/4334 ,  H01L23/49541 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/06179 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48599 ,  H01L2224/4899 ,  H01L2224/49171 ,  H01L2224/49179 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/07802 ,  H01L2924/10162 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/20752 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/85399

摘要： There is provided a semiconductor chip mounting area for mounting a semiconductor chip, and the points of the inner leads are made to come closer to the semiconductor chip mounting area by arranging the points of the inner leads at equal intervals over the whole periphery of the semiconductor chip mounting area. The points of the inner leads are arranged along the whole periphery of the semiconductor chip mounting area, and the lead pitch at the points of the inner leads corresponding to a corner portion of the semiconductor chip mounting area is made wider than the lead pitch of the other inner lead points.

摘要翻译： 提供了用于安装半导体芯片的半导体芯片安装区域，并且通过在半导体的整个周边上以等间隔排列内部引线的点，使内部引线的点靠近半导体芯片安装区域 芯片安装面积。 内引线的点沿着半导体芯片安装区域的整个周边布置，并且与半导体芯片安装区域的角部相对应的内引线的引线间距比引线间距 其他内部引导点。