公开(公告)号：US06909179B2

公开(公告)日：2005-06-21

申请号：US09904839

申请日：2001-07-16

申请人： Shigeki Tanaka ,  Atsushi Fujisawa ,  Souichi Nagano ,  Tsugihiko Hirano ,  Ryouichi Oota ,  Takafumi Konno ,  Kenichi Tatebe ,  Toshiaki Okamoto

发明人： Shigeki Tanaka ,  Atsushi Fujisawa ,  Souichi Nagano ,  Tsugihiko Hirano ,  Ryouichi Oota ,  Takafumi Konno ,  Kenichi Tatebe ,  Toshiaki Okamoto

IPC分类号： H01L23/433 ,  H01L23/495 ,  H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L24/85 ,  H01L23/4334 ,  H01L23/49541 ,  H01L24/06 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48624 ,  H01L2224/48647 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/85424 ,  H01L2224/85447 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/07802 ,  H01L2924/10162 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/20752 ,  H01L2924/20753 ,  H01L2224/78 ,  H01L2924/00 ,  H01L2924/00012

摘要： A semiconductor device includes a substrate, a semiconductor chip mounted on one surface of the substrate, wherein the semiconductor chip has an integrated circuit and bonding pads formed on a main surface thereof. The main surface of the semiconductor chip has a quadrilateral shape with the bonding pads being disposed along four sides of the main surface. A plurality of conductors is disposed on the one surface of the substrate so as to surround the semiconductor chip along four sides thereof and a plurality of bonding wires electrically connect the bonding pads with tips of the conductors, respectively. A resin body seals the semiconductor chip, the conductors and the plurality of bonding wires. A pitch between adjacent bonding pads increases in a direction toward four corners defined by the four sides of the main surface of the semiconductor chip.

摘要翻译： 半导体器件包括衬底，安装在衬底的一个表面上的半导体芯片，其中半导体芯片具有形成在其主表面上的集成电路和焊盘。 半导体芯片的主表面具有四边形形状，其中焊盘沿着主表面的四边设置。 多个导体设置在基板的一个表面上，以便沿其四个侧面包围半导体芯片，并且多个接合线分别将接合焊盘与导体的尖端电连接。 树脂体密封半导体芯片，导体和多根接合线。 相邻接合焊盘之间的间距在朝向由半导体芯片的主表面的四个边限定的四个角的方向上增加。

公开(公告)号：US06764878B2

公开(公告)日：2004-07-20

申请号：US10193289

申请日：2002-07-12

申请人： Atsushi Fujisawa ,  Takafumi Konno ,  Shingo Ohsaka ,  Ryo Haruta ,  Masahiro Ichitani

发明人： Atsushi Fujisawa ,  Takafumi Konno ,  Shingo Ohsaka ,  Ryo Haruta ,  Masahiro Ichitani

IPC分类号： H01L2148

CPC分类号： H01L24/32 ,  H01L21/565 ,  H01L23/3128 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/97 ,  H01L2224/05554 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/32057 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/83194 ,  H01L2224/83385 ,  H01L2224/92 ,  H01L2224/92247 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01046 ,  H01L2924/0105 ,  H01L2924/01056 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/07802 ,  H01L2924/10162 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15151 ,  H01L2924/15183 ,  H01L2924/15311 ,  H01L2924/1579 ,  H01L2924/181 ,  H01L2224/85 ,  H01L2224/83 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/13116 ,  H01L2224/45015 ,  H01L2924/207

摘要： In a ball grid array type semiconductor package, a semiconductor chip is mounted through an adhesive material on a surface of a flexible film substrate. Plural bump electrodes are arranged in an array on the opposite side of said substrate and the semiconductor chip is sealed by a resin. In this regard, an insulation layer is formed to cover an electric conductor layer pattern formed on the surface of the substrate, and the semiconductor chip is mounted through an adhesive material on the insulation layer. The insulation layer is divided into a plural number of parts that are mutually discontinuous in the area under the semiconductor chip. By this divided insulation layer, a short circuit between the semiconductor chip and the electric conductor layer pattern is prevented and a deformation of the substrate that comprises the flexible films is suppressed.

摘要翻译： 在球栅阵列型半导体封装中，半导体芯片通过粘合材料安装在柔性薄膜基板的表面上。 多个凸起电极在所述基板的相对侧上排列成阵列，半导体芯片由树脂密封。 在这方面，形成绝缘层以覆盖形成在基板的表面上的导电体层图案，并且半导体芯片通过粘合材料安装在绝缘层上。 绝缘层被分成在半导体芯片下面的区域中相互不连续的多个部分。 通过该分隔绝缘层，可以防止半导体芯片与导电体层图案之间的短路，抑制包含柔性膜的基板的变形。

公开(公告)号：US06551862B2

公开(公告)日：2003-04-22

申请号：US09978724

申请日：2001-10-18

申请人： Riyouichi Oota ,  Tsugihiko Hirano ,  Atsushi Fujisawa ,  Takafumi Konno

发明人： Riyouichi Oota ,  Tsugihiko Hirano ,  Atsushi Fujisawa ,  Takafumi Konno

IPC分类号： H01L2150

CPC分类号： H01L21/6836 ,  H01L21/565 ,  H01L23/16 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/564 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/83 ,  H01L2221/68327 ,  H01L2224/274 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/83191 ,  H01L2224/8385 ,  H01L2224/92 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/07802 ,  H01L2924/14 ,  H01L2924/15151 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/3511 ,  H01L2924/00 ,  H01L2924/3512 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor device is disclosed, comprising a tape substrate which supports a semiconductor chip, an insulating adhesive layer disposed between the semiconductor chip and the tape substrate, an insulating sheet member laminated to the insulating adhesive layer and formed harder than the insulating adhesive layer, wires for connecting pads on the semiconductor chip with connecting terminals on the tape substrate, a sealing portion formed by sealing the semiconductor chip with resin, and plural solder balls provided on a back of the tape substrate. A die bonding layer for fixing the semiconductor chip thereto is composed of an insulating adhesive layer and the insulating sheet member laminated thereto. The die bonding layer is formed thick by such a multi-layer structure, whereby the resin balance of the surface and back of the semiconductor chip is improved to prevent warping of a package and improve the mounting temperature cyclicity and reflow characteristic.

公开(公告)号：US06265762B1

公开(公告)日：2001-07-24

申请号：US08820228

申请日：1997-03-18

申请人： Shigeki Tanaka ,  Atsushi Fujisawa ,  Souichi Nagano ,  Tsugihiko Hirano ,  Ryouichi Oota ,  Takafumi Konno ,  Kenichi Tatebe ,  Toshiaki Okamoto

发明人： Shigeki Tanaka ,  Atsushi Fujisawa ,  Souichi Nagano ,  Tsugihiko Hirano ,  Ryouichi Oota ,  Takafumi Konno ,  Kenichi Tatebe ,  Toshiaki Okamoto

IPC分类号： H01L23495

CPC分类号： H01L24/06 ,  H01L23/4334 ,  H01L23/49541 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/06179 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48599 ,  H01L2224/4899 ,  H01L2224/49171 ,  H01L2224/49179 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/07802 ,  H01L2924/10162 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/20752 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/85399

摘要： There is provided a semiconductor chip mounting area for mounting a semiconductor chip, and the points of the inner leads are made to come closer to the semiconductor chip mounting area by arranging the points of the inner leads at equal intervals over the whole periphery of the semiconductor chip mounting area. The points of the inner leads are arranged along the whole periphery of the semiconductor chip mounting area, and the lead pitch at the points of the inner leads corresponding to a corner portion of the semiconductor chip mounting area is made wider than the lead pitch of the other inner lead points.

摘要翻译： 提供了用于安装半导体芯片的半导体芯片安装区域，并且通过在半导体的整个周边上以等间隔排列内部引线的点，使内部引线的点靠近半导体芯片安装区域 芯片安装面积。 内引线的点沿着半导体芯片安装区域的整个周边布置，并且与半导体芯片安装区域的角部相对应的内引线的引线间距比引线间距 其他内部引导点。

公开(公告)号：US06803258B2

公开(公告)日：2004-10-12

申请号：US10152727

申请日：2002-05-23

申请人： Fujio Ito ,  Hiroaki Tanaka ,  Hiromichi Suzuki ,  Tokuji Toida ,  Takafumi Konno ,  Kunihiro Tsubosaki ,  Shigeki Tanaka ,  Kazunari Suzuki ,  Akihiko Kameoka

发明人： Fujio Ito ,  Hiroaki Tanaka ,  Hiromichi Suzuki ,  Tokuji Toida ,  Takafumi Konno ,  Kunihiro Tsubosaki ,  Shigeki Tanaka ,  Kazunari Suzuki ,  Akihiko Kameoka

IPC分类号： H01L2150

CPC分类号： H01L24/32 ,  H01L23/4334 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2224/05554 ,  H01L2224/29007 ,  H01L2224/32014 ,  H01L2224/32055 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/484 ,  H01L2224/48599 ,  H01L2224/49171 ,  H01L2224/49431 ,  H01L2224/49433 ,  H01L2224/73265 ,  H01L2224/85385 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/0132 ,  H01L2924/10162 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/01026 ,  H01L2924/00012 ,  H01L2924/3512 ,  H01L2224/85399 ,  H01L2224/05599

摘要： In a semiconductor device having a heat radiation plate, the tips of inner leads connected to a semiconductor chip have a lead width w and a lead thickness t, the width being less than the thickness. The inner leads are secured to the heat radiation plate. Fastening the inner leads to the heat radiation plate supports the latter and eliminates the need for suspending leads. A lead pitch p, the lead width w and lead thickness t of the inner lead tips connected to the semiconductor chip have the relations of w

摘要翻译： 在具有散热板的半导体器件中，连接到半导体芯片的内部引线的尖端具有引线宽度w和引线厚度t，宽度小于厚度。 内引线固定在散热板上。 将内部引线固定到散热板上，支撑后者，并且不需要悬挂引线。 引线间距p，连接到半导体芯片的内引线头的引线宽度w和引线厚度t具有w

公开(公告)号：US06590275B2

公开(公告)日：2003-07-08

申请号：US10059341

申请日：2002-01-31

申请人： Atsushi Fujisawa ,  Takafumi Konno ,  Shingo Ohsaka ,  Ryo Haruta ,  Masahiro Ichitani

发明人： Atsushi Fujisawa ,  Takafumi Konno ,  Shingo Ohsaka ,  Ryo Haruta ,  Masahiro Ichitani

IPC分类号： H01L23495

CPC分类号： H01L24/32 ,  H01L21/565 ,  H01L23/3128 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/97 ,  H01L2224/05554 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/32057 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/83194 ,  H01L2224/83385 ,  H01L2224/92 ,  H01L2224/92247 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01046 ,  H01L2924/0105 ,  H01L2924/01056 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/07802 ,  H01L2924/10162 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15151 ,  H01L2924/15183 ,  H01L2924/15311 ,  H01L2924/1579 ,  H01L2924/181 ,  H01L2224/85 ,  H01L2224/83 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/13116 ,  H01L2224/45015 ,  H01L2924/207

摘要： In a ball grid array type semiconductor package, a semiconductor chip is mounted through an adhesive material on a surface of a flexible film substrate. Plural bump electrodes are arranged in an array on the opposite side of said substrate and the semiconductor chip is sealed by a resin. In this regard, an insulation layer is formed to cover an electric conductor layer pattern formed on the surface of the substrate, and the semiconductor chip is mounted through an adhesive material on the insulation layer. The insulation layer is divided into a plural number of parts that are mutually discontinuous in the area under the semiconductor chip. By this divided insulation layer, a short circuit between the semiconductor chip and the electric conductor layer pattern is prevented and a deformation of the substrate that comprises the flexible films is suppressed.

公开(公告)号：US06448111B1

公开(公告)日：2002-09-10

申请号：US09594046

申请日：2000-06-15

申请人： Atsushi Fujisawa ,  Takafumi Konno ,  Shingo Ohsaka ,  Ryo Haruta ,  Masahiro Ichitani

发明人： Atsushi Fujisawa ,  Takafumi Konno ,  Shingo Ohsaka ,  Ryo Haruta ,  Masahiro Ichitani

IPC分类号： H01L2144

CPC分类号： H01L24/32 ,  H01L21/565 ,  H01L23/3128 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/97 ,  H01L2224/05554 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/32057 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/83194 ,  H01L2224/83385 ,  H01L2224/92 ,  H01L2224/92247 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01046 ,  H01L2924/0105 ,  H01L2924/01056 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/07802 ,  H01L2924/10162 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15151 ,  H01L2924/15183 ,  H01L2924/15311 ,  H01L2924/1579 ,  H01L2924/181 ,  H01L2224/85 ,  H01L2224/83 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/13116 ,  H01L2224/45015 ,  H01L2924/207

摘要： In a method of forming a ball grid array type semiconductor package, a semiconductor chip is mounted through an adhesive material on a surface of a flexible film substrate. Plural bump electrodes are arranged in an array on the opposite side of said substrate and the semiconductor chip is sealed by a resin. In this regard, an insulation layer is formed to cover an electric conductor layer pattern formed on the surface of the substrate, and the semiconductor chip is mounted through an adhesive material on the insulation layer. The insulation layer is divided into a plural number of parts that are mutually discontinuous in the area under the semiconductor chip. By this divided insulation layer, a short circuit between the semiconductor chip and the electric conductor layer pattern is prevented and a deformation of the substrate that comprises the flexible films is suppressed.

摘要翻译： 在形成球栅阵列型半导体封装的方法中，半导体芯片通过粘合剂材料安装在柔性膜基板的表面上。 多个凸起电极在所述基板的相对侧上排列成阵列，半导体芯片由树脂密封。 在这方面，形成绝缘层以覆盖形成在基板的表面上的导电体层图案，并且半导体芯片通过粘合材料安装在绝缘层上。 绝缘层被分成在半导体芯片下面的区域中相互不连续的多个部分。 通过该分隔绝缘层，可以防止半导体芯片与导电体层图案之间的短路，抑制包含柔性膜的基板的变形。

公开(公告)号：US08466540B2

公开(公告)日：2013-06-18

申请号：US12693984

申请日：2010-01-26

申请人： Shigeki Tanaka ,  Masakazu Sakano ,  Toshiyuki Shinya ,  Takafumi Konno ,  Kazuaki Yoshida ,  Takashi Sato ,  Atsushi Fujisawa

发明人： Shigeki Tanaka ,  Masakazu Sakano ,  Toshiyuki Shinya ,  Takafumi Konno ,  Kazuaki Yoshida ,  Takashi Sato ,  Atsushi Fujisawa

IPC分类号： H01L23/495

CPC分类号： H01L23/49575 ,  B81B7/007 ,  B81B2207/098 ,  B81C1/0023 ,  G01C19/56 ,  G01L19/141 ,  G01P1/023 ,  H01L21/565 ,  H01L23/3107 ,  H01L24/48 ,  H01L24/49 ,  H01L24/97 ,  H01L2224/05554 ,  H01L2224/32245 ,  H01L2224/48011 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/78301 ,  H01L2224/85045 ,  H01L2224/85186 ,  H01L2224/85207 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01083 ,  H01L2924/014 ,  H01L2924/10161 ,  H01L2924/10162 ,  H01L2924/10253 ,  H01L2924/12041 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/181 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/30111 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2924/00012

摘要： The reliability of a semiconductor device is prevented from being reduced. A planar shape of a sealing body is comprised of a quadrangle having a pair of first sides, and a pair of second sides crossing with the first sides. Further, it has a die pad, a controller chip (first semiconductor chip) and a sensor chip (second semiconductor chip) mounted over the die pad, and a plurality of leads arranged along the first sides of the sealing body. The controller chip and the leads are electrically coupled to each other via wires (first wires), and the sensor chip and the controller chip are electrically coupled to each other via wires (second wires). Herein, the die pad is supported by a plurality of suspending leads formed integrally with the die pad and extending from the die pad toward the first sides of the sealing body. Each of the suspending leads has an offset part.

摘要翻译： 防止半导体器件的可靠性降低。 密封体的平面形状由具有一对第一侧面的四边形和与第一面交叉的一对第二侧面构成。 此外，其具有安装在管芯焊盘上的管芯焊盘，控制器芯片（第一半导体芯片）和传感器芯片（第二半导体芯片）以及沿着密封体的第一侧布置的多个引线。 控制器芯片和引线通过导线（第一布线）彼此电耦合，并且传感器芯片和控制器芯片通过导线（第二布线）彼此电耦合。 这里，管芯焊盘由与焊盘一体形成的多个悬置引线支撑，并从焊盘朝向密封体的第一侧延伸。 每个悬挂引线都有一个偏移部分。

公开(公告)号：US06887739B2

公开(公告)日：2005-05-03

申请号：US10611910

申请日：2003-07-03

申请人： Atsushi Fujisawa ,  Takafumi Konno ,  Shingo Ohsaka ,  Ryo Haruta ,  Masahiro Ichitani

发明人： Atsushi Fujisawa ,  Takafumi Konno ,  Shingo Ohsaka ,  Ryo Haruta ,  Masahiro Ichitani

IPC分类号： H01L23/14 ,  H01L21/56 ,  H01L23/31 ,  H01L2/44

CPC分类号： H01L24/32 ,  H01L21/565 ,  H01L23/3128 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/97 ,  H01L2224/05554 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/32057 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/83194 ,  H01L2224/83385 ,  H01L2224/92 ,  H01L2224/92247 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01046 ,  H01L2924/0105 ,  H01L2924/01056 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/07802 ,  H01L2924/10162 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15151 ,  H01L2924/15183 ,  H01L2924/15311 ,  H01L2924/1579 ,  H01L2924/181 ,  H01L2224/85 ,  H01L2224/83 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/13116 ,  H01L2224/45015 ,  H01L2924/207

摘要： In a method of forming a ball grid array type semiconductor package, a semiconductor chip is mounted through an adhesive material on a surface of a flexible film substrate. Plural bump electrodes are arranged in an array on the opposite side of said substrate and the semiconductor chip is sealed by a resin. In this regard, an insulation layer is formed to cover an electric conductor layer pattern formed on the surface of the substrate, and the semiconductor chip is mounted through an adhesive material on the insulation layer. The insulation layer is divided into a plural number of parts that are mutually discontinuous in the area under the semiconductor chip. By this divided insulation layer, a short circuit between the semiconductor chip and the electric conductor layer pattern is prevented and a deformation of the substrate that comprises the flexible films is suppressed.

摘要翻译： 在形成球栅阵列型半导体封装的方法中，半导体芯片通过粘合剂材料安装在柔性膜基板的表面上。 多个凸起电极在所述基板的相对侧上排列成阵列，半导体芯片由树脂密封。 在这方面，形成绝缘层以覆盖形成在基板的表面上的导电体层图案，并且半导体芯片通过粘合材料安装在绝缘层上。 绝缘层被分成在半导体芯片下面的区域中相互不连续的多个部分。 通过该分隔绝缘层，可以防止半导体芯片与导电体层图案之间的短路，抑制包含柔性膜的基板的变形。

公开(公告)号：US06759279B2

公开(公告)日：2004-07-06

申请号：US10214313

申请日：2002-08-08

申请人： Atsushi Fujisawa ,  Takafumi Konno ,  Shingo Ohsaka ,  Ryo Haruta ,  Masahiro Ichitani

发明人： Atsushi Fujisawa ,  Takafumi Konno ,  Shingo Ohsaka ,  Ryo Haruta ,  Masahiro Ichitani

IPC分类号： H01L2144

CPC分类号： H01L24/32 ,  H01L21/565 ,  H01L23/3128 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/97 ,  H01L2224/05554 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/32057 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/83194 ,  H01L2224/83385 ,  H01L2224/92 ,  H01L2224/92247 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01046 ,  H01L2924/0105 ,  H01L2924/01056 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/07802 ,  H01L2924/10162 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15151 ,  H01L2924/15183 ,  H01L2924/15311 ,  H01L2924/1579 ,  H01L2924/181 ,  H01L2224/85 ,  H01L2224/83 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/13116 ,  H01L2224/45015 ,  H01L2924/207

摘要： In a method of forming a ball grid array type semiconductor package, a semiconductor chip is mounted through an adhesive material on a surface of a flexible film substrate. Plural bump electrodes are arranged in an array on the opposite side of said substrate and the semiconductor chip is sealed by a resin. In this regard, an insulation layer is formed to cover an electric conductor layer pattern formed on the surface of the substrate, and the semiconductor chip is mounted through an adhesive material on the insulation layer. The insulation layer is divided into a plural number of parts that are mutually discontinuous in the area under the semiconductor chip. By this divided insulation layer, a short circuit between the semiconductor chip and the electric conductor layer pattern is prevented and a deformation of the substrate that comprises the flexible films is suppressed.

摘要翻译： 在形成球栅阵列型半导体封装的方法中，半导体芯片通过粘合剂材料安装在柔性膜基板的表面上。 多个凸起电极在所述基板的相对侧上排列成阵列，半导体芯片由树脂密封。 在这方面，形成绝缘层以覆盖形成在基板的表面上的导电体层图案，并且半导体芯片通过粘合材料安装在绝缘层上。 绝缘层被分成在半导体芯片下面的区域中相互不连续的多个部分。 通过该分隔绝缘层，可以防止半导体芯片与导电体层图案之间的短路，抑制包含柔性膜的基板的变形。