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公开(公告)号:US11276773B2
公开(公告)日:2022-03-15
申请号:US16950047
申请日:2020-11-17
发明人: Shinya Soneda , Kenji Harada , Kakeru Otsuka
IPC分类号: H01L29/739 , H01L29/06
摘要: A semiconductor device includes: first diode trench gates extending along a first main surface from a first end side of a cell region toward a second end side thereof opposite to the first end side, the first diode trench gates being disposed adjacent to each other at a first spacing; a boundary trench gate connected to end portions of the first diode trench gates and extending in a direction intersecting a direction of extension of the first diode trench gates; and second diode trench gates having end portions connected to the boundary trench gate and extending toward the second end side of the cell region.
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公开(公告)号:US11239329B2
公开(公告)日:2022-02-01
申请号:US16783115
申请日:2020-02-05
发明人: Shinya Soneda , Tetsuya Nitta , Kenji Harada
IPC分类号: H01L29/417 , H01L29/45 , H01L23/00 , H01L29/16 , H01L29/20
摘要: According to an aspect of the present disclosure, a semiconductor device includes a semiconductor substrate, a lower electrode provided on the semiconductor substrate, an insulating film that is provided on the semiconductor substrate and surrounds the lower electrode and a metal film that is provided on the lower electrode and includes a convex portion on an upper surface thereof, wherein the convex portion includes a first portion extending in a first direction parallel to an upper surface of the semiconductor substrate, and a second portion extending in a second direction that is parallel to the upper surface of the semiconductor substrate and intersects the first direction, and the metal film is thinner than the insulating film.
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公开(公告)号:US10950566B2
公开(公告)日:2021-03-16
申请号:US16440466
申请日:2019-06-13
发明人: Kenji Harada , Shinya Soneda
摘要: Provided is a technique for improving the durability of a semiconductor device. A semiconductor device includes a semiconductor substrate, an electrode on the semiconductor substrate, a solder-joining metal Him on the electrode, an oxidation-inhibiting metal film on the solder-joining metal film, and a solder layer on the oxidation-inhibiting metal film. The solder-joining metal film includes a first portion that does not overlap the oxidation-inhibiting metal film in plan view when the solder-joining metal film and the oxidation-inhibiting metal film are viewed from the oxidation-inhibiting metal film.
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公开(公告)号:US11875990B2
公开(公告)日:2024-01-16
申请号:US17240371
申请日:2021-04-26
发明人: Tetsuya Nitta , Munenori Ikeda , Shinya Soneda
IPC分类号: H01L29/08 , H01L27/06 , H01L29/739 , H01L29/861 , H01L29/66 , H01L21/265 , H01L21/266 , H01L21/225 , H01L29/78
CPC分类号: H01L29/0834 , H01L21/2253 , H01L21/266 , H01L21/26513 , H01L27/0664 , H01L29/66136 , H01L29/66348 , H01L29/7397 , H01L29/7805 , H01L29/8613
摘要: Provided is a semiconductor device in which a first anode layer and a first contact layer are provided on a first main surface side in a diode region, and in which a second anode layer and a second contact layer are provided on the first main surface side in a boundary region. A concentration of impurities of a second conductive type of the second anode layer is lower than a concentration of impurities of the second conductive type of the first anode layer, or an occupied area ratio of the second contact layer with respect to the area where the emitter electrode is in contact with the semiconductor substrate in the boundary region is smaller than an occupied area ratio of the first contact layer with respect to the area where the emitter electrode is in contact with the semiconductor substrate in the diode region.
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公开(公告)号:US11799023B2
公开(公告)日:2023-10-24
申请号:US17406003
申请日:2021-08-18
发明人: Koichi Nishi , Shinya Soneda
IPC分类号: H01L29/739 , H01L29/06
CPC分类号: H01L29/7397 , H01L29/0696
摘要: A semiconductor device includes: a semiconductor substrate including an upper surface and a lower surface opposing each other and a drift layer of a first conductivity type; a base layer of a second conductivity type; an emitter layer of the first conductivity type and a contact layer of the second conductivity type; an active trench; dummy trenches; a trench gate electrode formed in the active trench; a dummy trench gate electrode formed in each of the dummy trenches; an embedded insulating film formed on the trench gate electrode in the active trench, formed on the dummy trench gate electrode in the dummy trench, and having an upper end lower than the upper surface; and an emitter electrode contacting the emitter layer on the upper surface and an inner wall of the active trench, and contacting the contact layer on the upper surface and an inner wall of the dummy trench.
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公开(公告)号:US11322604B2
公开(公告)日:2022-05-03
申请号:US16928282
申请日:2020-07-14
发明人: Shinya Soneda , Ryu Kamibaba , Tetsuya Nitta
IPC分类号: H01L29/739 , H01L29/74 , H01L29/66
摘要: An object is to provide a technique capable of improving both recovery loss and recovery capability. The semiconductor device includes a base layer of a second conductive type disposed on a front surface side of the semiconductor substrate in the IGBT region and an anode layer of a second conductive type disposed on a front surface side of the semiconductor substrate in the diode region. The anode layer includes a first portion having a lower end located at a same position as a lower end of the base layer or having a lower end located above the lower end of the base layer and a second portion adjacent to the first portion in plan view, and whose lower end is located above the lower end of the first portion.
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公开(公告)号:US10186571B2
公开(公告)日:2019-01-22
申请号:US15896847
申请日:2018-02-14
发明人: Shinya Soneda
IPC分类号: H01L21/263 , H01L29/06 , H01L27/06 , H01L29/739 , H01L27/07
摘要: An RC-IGBT according to the invention includes a high electric field cell formed in a region surrounded by an IGBT cell or in a region surrounded by a diode cell, and an n+ diffusion layer formed at a position opposed to the high electric field cell, the position being on a second main surface of an n− type drift layer. The high electric field cell has a higher maximum electric field intensity generated when a voltage is applied between main terminals than maximum electric field intensities of the IGBT cell, the diode cell, and a withstand voltage holding structure. Additionally, a p+ type collector layer and the high electric field cell fail to overlap with each other in a direction vertical to a first main surface of the n− type drift layer in a plane view.
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公开(公告)号:US09799648B2
公开(公告)日:2017-10-24
申请号:US14990092
申请日:2016-01-07
发明人: Atsushi Narazaki , Shinya Soneda
IPC分类号: H01L27/07 , H01L29/423 , H01L29/739 , H01L29/417 , H01L29/06 , H01L29/861
CPC分类号: H01L27/0755 , H01L27/0727 , H01L29/0619 , H01L29/0692 , H01L29/0696 , H01L29/41741 , H01L29/7397 , H01L29/8613
摘要: A semiconductor device of the present invention includes: an IGBT including an emitter layer on a first main surface side of a semiconductor substrate and a collector layer on a second main surface side of the semiconductor substrate; a freewheeling diode including an anode layer on the first main surface side of the semiconductor substrate and a cathode layer on the second main surface side of the semiconductor substrate; a well region that is located in a boundary between the IGBT and the freewheeling diode and separates the IGBT and the freewheeling diode; a first electrode located on the first main surface of the semiconductor substrate so as to be connected to the emitter layer, the anode layer, and the well region; a resistance element located between the well region and the first electrode.
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公开(公告)号:US12020935B2
公开(公告)日:2024-06-25
申请号:US17563603
申请日:2021-12-28
发明人: Koichi Nishi , Shinya Soneda , Kazuya Konishi
IPC分类号: H01L21/266 , H01L21/22 , H01L21/768
CPC分类号: H01L21/266 , H01L21/2225 , H01L21/76831
摘要: An object of the present disclosure is to reduce masks and to reduce the variation in the profile of an impurity layer in a semiconductor device. A method of manufacturing a semiconductor device includes a step (b) of forming a base layer on a first main surface side of a drift layer in an active region by implanting p-type impurity ions of using the first mask, a step of (c) of forming an emitter layer on the first main surface side of the base layer by implanting n-type impurity ions using the first mask, a step (d) of forming trenches after the steps (b) and (c), a step (e) of embedding a gate electrode inside the trenches, and a step (g) of converting a part of the emitter layer into a first contact layer by implanting the p-type impurity ions having a high dosage using a second mask.
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公开(公告)号:US11462615B2
公开(公告)日:2022-10-04
申请号:US17101439
申请日:2020-11-23
发明人: Ryu Kamibaba , Shinya Soneda , Tetsuya Nitta
IPC分类号: H01L29/08 , H01L29/06 , H01L29/739 , H01L29/66 , H01L29/45 , H01L29/861
摘要: Provided is a semiconductor device having improved breakdown resistance during recovery operation. A semiconductor device according to the present application is a semiconductor device in which an insulated gate bipolar transistor region and a diode region are provided adjacent to each other. The insulated gate bipolar transistor region includes an emitter layer having a short-side direction in a first direction in a plan view. The diode region includes carrier injection suppression layer having a short-side direction in a second direction in a plan view. In a plan view, a width of the carrier injection suppression layer in the second direction is smaller than a width of the emitter layer in the first direction.
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