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    Memory device
    1.
    发明授权
    Memory device 有权

    公开(公告)号：US12230331B2

    公开(公告)日：2025-02-18

    申请号：US17901459

    申请日：2022-09-01

    Applicant: Kioxia Corporation

    Inventor： Hiroshi Maejima

    IPC: G11C16/26 ,  H01L23/00 ,  H01L25/065 ,  H01L25/18

    Abstract: A memory device includes a first memory cell and a second memory cell each corresponding to a first column address, a first sense amplifier unit, a first bit line connected between the first memory cell and the first sense amplifier unit, and a second bit line connected between the second memory cell and the first sense amplifier unit.

    Nonvolatile semiconductor memory
    2.
    发明授权
    Nonvolatile semiconductor memory 有权

    公开(公告)号：US12229447B2

    公开(公告)日：2025-02-18

    申请号：US18242521

    申请日：2023-09-06

    Applicant: Kioxia Corporation

    Inventor： Hiroshi Maejima

    IPC: G06F3/06 ,  G06N3/08 ,  G11C16/04 ,  G11C16/08

    Abstract: A nonvolatile semiconductor memory includes a plurality of memory cells, a plurality of bit lines connected to the plurality of memory cells, a first circuit which controls the plurality of bit lines according to first data, a source line commonly connected to first ends of the plurality of bit lines, and a second circuit which is connected to the source line and which detects second data according to a current amount in the source line.

    Semiconductor memory device including a memory chip and a circuit chip bonded to the memory chip
    6.
    发明授权
    Semiconductor memory device including a memory chip and a circuit chip bonded to the memory chip 有权

    公开(公告)号：US11538791B2

    公开(公告)日：2022-12-27

    申请号：US16802462

    申请日：2020-02-26

    Applicant: KIOXIA CORPORATION

    Inventor： Hiroshi Maejima ,  Toshifumi Hashimoto ,  Takashi Maeda ,  Masumi Saitoh ,  Tetsuaki Utsumi

    IPC: H01L25/065 ,  H01L25/18 ,  H01L23/00

    Abstract: A semiconductor memory device includes a memory chip. The memory chip includes a first region including a plurality of first memory cells and second memory cells, a second region different from the first region, a plurality of first word lines stacked apart from each other in a first direction in the first and second regions, a first pillar including a first semiconductor layer extending through the first word lines, and a first insulator layer provided between the first semiconductor layer and the first word lines, in the first region, the first memory cells being located at intersections of the first pillar with the first word lines, a first bonding pad in the second region, and a first transistor between the first word lines and the first bonding pad, and connected between one of the first word lines and the first bonding pad, in the second region.

    Semiconductor memory device
    9.
    发明授权
    Semiconductor memory device 有权

    公开(公告)号：US11967380B2

    公开(公告)日：2024-04-23

    申请号：US17841362

    申请日：2022-06-15

    Applicant: Kioxia Corporation

    Inventor： Hiroshi Maejima

    IPC: G11C16/16 ,  G11C16/04 ,  G11C16/08 ,  G11C16/10 ,  G11C16/26

    CPC classification number: G11C16/0483 ,  G11C16/08 ,  G11C16/10 ,  G11C16/26 ,  G11C16/16

    Abstract: According to One embodiment, a semiconductor memory device includes: a first memory cell array; a second memory cell array arranged above the memory cell array; a third memory cell array arranged adjacent to the first memory cell array; a fourth memory cell array arranged above the third memory cell array and arranged adjacent to the second memory cell array; a first word line coupled to the first memory cell array and the second memory cell array; a second word line coupled to the third memory cell array and the fourth memory cell array; a first bit line coupled to the first memory cell array and the fourth memory cell array; and a second bit line coupled to the second memory cell array and the third memory cell array.

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