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    MEMORY SYSTEM
    3.
    发明公开
    MEMORY SYSTEM 审中-公开

    公开(公告)号：US20230367487A1

    公开(公告)日：2023-11-16

    申请号：US18088129

    申请日：2022-12-23

    Applicant: Kioxia Corporation

    Inventor： Yoshihisa Kojima ,  Shunichi Igahara ,  Toshikatsu Hida

    IPC: G06F3/06

    CPC classification number: G06F3/0619 ,  G06F3/0659 ,  G06F3/064 ,  G06F3/0679

    Abstract: According to one embodiment, a memory system includes a non-volatile memory and a memory controller. The non-volatile memory includes a first block that includes first and second sub-blocks. The memory controller instructs the non-volatile memory to execute a data erase process in units of sub-blocks on data stored in the non-volatile memory. In response to a first value corresponding to the first sub-block having reached a first threshold value, the memory controller reads first data from the first sub-block, executes an error correction process on the first data read from the first sub-block, and writes the first data on which the error correction process has been executed into the non-volatile memory.

    Memory system and controller
    8.
    发明授权
    Memory system and controller 有权

    公开(公告)号：US11693463B2

    公开(公告)日：2023-07-04

    申请号：US17878788

    申请日：2022-08-01

    Applicant: Kioxia Corporation

    Inventor： Yoshihisa Kojima ,  Katsuhiko Ueki

    IPC: G06F1/00 ,  G06F1/26 ,  G06F12/02

    CPC classification number: G06F1/263 ,  G06F12/0246 ,  G06F2212/205 ,  G06F2212/2028

    Abstract: In a memory system in an embodiment, in a case of normal operation, a control unit returns a write completion response upon completion of reception of write data from a host, and writes the write data into nonvolatile memory in a multiple values. In a case of unordinary power-off, changeover to operation using a backup battery is conducted and the control unit writes dirty data that is not completed in writing into the nonvolatile memory, into the nonvolatile memory with two values. When next boot, the control unit reads the dirty data from the nonvolatile memory into the volatile memory, and thereafter writes the dirty data into the nonvolatile memory in a multiple values.

    Semiconductor memory medium and memory system
    9.
    发明授权
    Semiconductor memory medium and memory system 有权

    公开(公告)号：US11615851B2

    公开(公告)日：2023-03-28

    申请号：US17572279

    申请日：2022-01-10

    Applicant: Kioxia Corporation

    Inventor： Suguru Nishikawa ,  Takehiko Amaki ,  Yoshihisa Kojima ,  Shunichi Igahara

    IPC: G11C16/34 ,  G11C16/10 ,  G11C16/04 ,  G11C16/14 ,  G11C16/26 ,  G11C16/08

    Abstract: According to one embodiment, the semiconductor memory medium includes a first memory cell, a first word line coupled to the first memory cell, and a row decoder coupled to the first word line. A write operation is executed multiple times on the first memory cell within a first period from after an execution of an erase operation to an execution of a next erase operation. The write operation includes at least one of program loops each including a program operation and a verify operation. In the verify operation, the row decoder applies a verify voltage to the first word line. The verify voltage is set in accordance with a number of executed write operations on the first memory cell within the first period.

    Memory system, control method thereof, and program
    10.
    发明授权
    Memory system, control method thereof, and program 有权

    公开(公告)号：US11574688B2

    公开(公告)日：2023-02-07

    申请号：US17410872

    申请日：2021-08-24

    Applicant: KIOXIA CORPORATION

    Inventor： Yoshihisa Kojima

    IPC: G11C11/56 ,  G11C16/32 ,  G11C16/26 ,  G11C16/08 ,  G11C16/34 ,  G11C16/04 ,  G11C7/04 ,  G11C16/10

    Abstract: A memory system includes a nonvolatile memory configured to execute one of a plurality of read operations, including a first read operation and a second read operation, and a memory controller configured to issue a read command to the nonvolatile memory to cause the nonvolatile memory to execute one of the plurality of read operations. The memory controller is configured to receive a read request, estimate a reliability level of a result of a read operation to be executed by the nonvolatile memory to read data from a physical address specified in the read request, select one of the first and second read operations to be executed first in a read sequence corresponding to the read request by the nonvolatile memory based on the estimated reliability level, and instruct the nonvolatile memory to execute the selected read operation.

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