公开(公告)号：US08780572B2

公开(公告)日：2014-07-15

申请号：US12923720

申请日：2010-10-05

申请人： Doo Hwan Lee ,  Tae Sung Jeong

发明人： Doo Hwan Lee ,  Tae Sung Jeong

IPC分类号： H05K1/18

CPC分类号： H05K1/185 ,  H01L21/568 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/20 ,  H01L2224/04105 ,  H01L2224/24227 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/014 ,  H01L2924/351 ,  H01L2924/3511 ,  H05K2201/10674 ,  H05K2203/0191 ,  H05K2203/1469 ,  Y10T29/4913 ,  H01L2924/00

摘要： A printed circuit board that include: an electronic component having a plating electrode pad having a predetermined thickness; an insulating resin layer that exposes a lower surface of the electrode pad, receives the electronic component, and embodies the electronic component so that the center of the base body forming the electronic component is positioned at the center of the insulating resin layer; and circuit layers that include a circuit pattern disposed on the electrode pad, form inter-layer connection, and are disposed on both surfaces of the insulating resin layer, respectively, the plating electrode pad having a thickness that conforms to a thickness from an upper surface of the electronic component to an upper surface of the insulating resin.

摘要翻译： 一种印刷电路板，包括：具有预定厚度的电镀电极垫的电子部件; 暴露电极焊盘的下表面的绝缘树脂层接收电子部件，并且实施电子部件，使得形成电子部件的基体的中心位于绝缘树脂层的中心; 以及电路层，其包括设置在电极焊盘上的电路图案，形成层间连接，并且分别设置在绝缘树脂层的两个表面上，电镀电极焊盘的厚度与上表面的厚度一致 的绝缘树脂的上表面。

公开(公告)号：US20110290546A1

公开(公告)日：2011-12-01

申请号：US12923720

申请日：2010-10-05

申请人： Doo Hwan Lee ,  Tae Sung Jeong

发明人： Doo Hwan Lee ,  Tae Sung Jeong

IPC分类号： H05K1/16 ,  H05K3/30

CPC分类号： H05K1/185 ,  H01L21/568 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/20 ,  H01L2224/04105 ,  H01L2224/24227 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/014 ,  H01L2924/351 ,  H01L2924/3511 ,  H05K2201/10674 ,  H05K2203/0191 ,  H05K2203/1469 ,  Y10T29/4913 ,  H01L2924/00

摘要： Disclosed herein are a printed circuit board having an electronic component and a manufacturing method thereof. The printed circuit board having an electronic component may include: an electronic component having a plating electrode pad having a predetermined thickness; an insulating resin layer that exposes a lower surface of the electrode pad, receives the electronic component, and embodies the electronic component so that the center of the base body forming the electronic component is positioned at the center of the insulating resin layer; and circuit layers that include a circuit pattern disposed on the electrode pad, form inter-layer connection, and are disposed on both surfaces of the insulating resin layer, respectively.

摘要翻译： 这里公开了具有电子部件的印刷电路板及其制造方法。 具有电子部件的印刷电路板可以包括：具有预定厚度的电镀焊盘的电子部件; 暴露电极焊盘的下表面的绝缘树脂层接收电子部件，并且实施电子部件，使得形成电子部件的基体的中心位于绝缘树脂层的中心; 以及电路层，其包括设置在电极焊盘上的电路图案，形成层间连接，并且分别设置在绝缘树脂层的两个表面上。

公开(公告)号：US08692391B2

公开(公告)日：2014-04-08

申请号：US12972310

申请日：2010-12-17

申请人： Tae Sung Jeong ,  Doo Hwan Lee ,  Seung Eun Lee

发明人： Tae Sung Jeong ,  Doo Hwan Lee ,  Seung Eun Lee

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H05K1/18

CPC分类号： H01L24/11 ,  H01L23/49827 ,  H01L23/5389 ,  H01L24/32 ,  H01L24/48 ,  H01L24/83 ,  H01L24/85 ,  H01L24/92 ,  H01L2224/2919 ,  H01L2224/32155 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/83001 ,  H01L2224/838 ,  H01L2224/85 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： Disclosed herein are an embedded ball grid array substrate and a manufacturing method thereof. The embedded ball grid array includes: a core layer having a cavity therein; a semiconductor device embedded in the cavity of the core layer; a first circuit layer having a circuit pattern including a wire bonding pad formed thereon; a second circuit layer having a circuit pattern including a solder ball pattern formed thereon; and a wire electrically connecting the semiconductor device to the wire bonding pad.

摘要翻译： 本文公开了嵌入式球栅阵列基板及其制造方法。 嵌入式球栅阵列包括：其中具有空腔的芯层; 嵌入在芯层的空腔中的半导体器件; 第一电路层，具有包括在其上形成的引线接合焊盘的电路图案; 第二电路层，其具有包括形成在其上的焊球图案的电路图案; 以及将半导体器件电连接到引线接合焊盘的线。

公开(公告)号：US09087837B2

公开(公告)日：2015-07-21

申请号：US13572833

申请日：2012-08-13

申请人： Doo Hwan Lee ,  Tae Sung Jeong ,  Yul Kyo Chung

发明人： Doo Hwan Lee ,  Tae Sung Jeong ,  Yul Kyo Chung

IPC分类号： H01L23/28 ,  H01L21/52 ,  H01L23/00 ,  H01L23/31 ,  H01L21/56 ,  H01L23/538 ,  H01L21/768 ,  H01L23/544 ,  H01L21/54 ,  H01L21/78

CPC分类号： H01L21/52 ,  H01L21/54 ,  H01L21/561 ,  H01L21/76802 ,  H01L21/76877 ,  H01L21/78 ,  H01L23/3107 ,  H01L23/3121 ,  H01L23/3128 ,  H01L23/5389 ,  H01L23/544 ,  H01L23/562 ,  H01L24/19 ,  H01L24/20 ,  H01L24/83 ,  H01L24/92 ,  H01L24/97 ,  H01L2223/54426 ,  H01L2223/54486 ,  H01L2224/04105 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2224/92244 ,  H01L2224/97 ,  H01L2924/12042 ,  H01L2924/15153 ,  H01L2924/181 ,  H01L2224/19 ,  H01L2224/83 ,  H01L2924/00014 ,  H01L2924/00

摘要： Disclosed herein are a semiconductor package and a method of manufacturing the same, the semiconductor package including: a molding member having a cavity formed therein; a device mounted in the cavity; an insulating member formed inside the cavity and on and/or beneath the molding member and the device; a circuit layer formed on the insulating member, and including vias and connection pads electrically connected with the device; a solder resist layer formed on the circuit layer, and having openings exposing upper portions of the connection pads; and solder balls formed in the openings.

摘要翻译： 这里公开了一种半导体封装及其制造方法，所述半导体封装包括：模制构件，其中形成有空腔; 安装在腔体中的装置; 绝缘构件，其形成在所述空腔内并且在所述模制构件和所述装置之上和/或之下; 形成在所述绝缘构件上的电路层，并且包括与所述装置电连接的通孔和连接垫; 形成在电路层上的阻焊层，并且具有暴露连接焊盘的上部的开口; 以及形成在开口中的焊球。

公开(公告)号：US20130320516A1

公开(公告)日：2013-12-05

申请号：US13572833

申请日：2012-08-13

申请人： Doo Hwan Lee ,  Tae Sung Jeong ,  Yul Kyo Chung

发明人： Doo Hwan Lee ,  Tae Sung Jeong ,  Yul Kyo Chung

IPC分类号： H01L21/52 ,  H01L21/54 ,  H01L23/24 ,  H01L21/60 ,  H01L23/498 ,  H01L23/055

CPC分类号： H01L21/52 ,  H01L21/54 ,  H01L21/561 ,  H01L21/76802 ,  H01L21/76877 ,  H01L21/78 ,  H01L23/3107 ,  H01L23/3121 ,  H01L23/3128 ,  H01L23/5389 ,  H01L23/544 ,  H01L23/562 ,  H01L24/19 ,  H01L24/20 ,  H01L24/83 ,  H01L24/92 ,  H01L24/97 ,  H01L2223/54426 ,  H01L2223/54486 ,  H01L2224/04105 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2224/92244 ,  H01L2224/97 ,  H01L2924/12042 ,  H01L2924/15153 ,  H01L2924/181 ,  H01L2224/19 ,  H01L2224/83 ,  H01L2924/00014 ,  H01L2924/00

摘要： Disclosed herein are a semiconductor package and a method of manufacturing the same, the semiconductor package including: a molding member having a cavity formed therein; a device mounted in the cavity; an insulating member formed inside the cavity and on and/or beneath the molding member and the device; a circuit layer formed on the insulating member, and including vias and connection pads electrically connected with the device; a solder resist layer formed on the circuit layer, and having openings exposing upper portions of the connection pads; and solder balls formed in the openings.

摘要翻译： 这里公开了一种半导体封装及其制造方法，所述半导体封装包括：模制构件，其中形成有空腔; 安装在腔体中的装置; 绝缘构件，其形成在所述空腔内并且在所述模制构件和所述装置之上和/或之下; 形成在所述绝缘构件上的电路层，并且包括与所述装置电连接的通孔和连接垫; 形成在电路层上的阻焊层，并且具有暴露连接焊盘的上部的开口; 以及形成在开口中的焊球。

公开(公告)号：US08893380B2

公开(公告)日：2014-11-25

申请号：US12320492

申请日：2009-01-27

申请人： Hong Won Kim ,  Sung Yi ,  Tae Sung Jeong ,  Joon Seok Kang

发明人： Hong Won Kim ,  Sung Yi ,  Tae Sung Jeong ,  Joon Seok Kang

IPC分类号： H05K3/30 ,  H01L23/00 ,  H05K1/18 ,  H01L21/683 ,  H05K3/42

CPC分类号： H05K1/185 ,  H01L21/568 ,  H01L21/6835 ,  H01L24/18 ,  H01L24/19 ,  H01L24/82 ,  H01L24/96 ,  H01L2224/04105 ,  H01L2224/18 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01059 ,  H01L2924/01078 ,  H05K3/426 ,  H05K2201/10515 ,  H05K2201/10674 ,  H05K2203/1461 ,  Y10T29/4913 ,  Y10T29/49146 ,  Y10T29/49165

摘要： The present invention relates to a chip embedded printed circuit board and a manufacturing method thereof and provides a chip embedded printed circuit board including: an insulating layer having vias formed therethrough; a first chip and a second chip embedded in the insulating layer and having pads, which are respectively exposed to upper and lower surfaces of the insulating layer, on one surfaces thereof; an upper pattern formed on the upper surface of the insulating layer to be connected to the pads of the first chip and the vias; and a lower pattern formed on the lower surface of the insulating layer to be connected to the pads of the second chip and the vias. Also, the present invention provides a manufacturing method of a chip embedded printed circuit board.

摘要翻译： 芯片嵌入式印刷电路板及其制造方法技术领域本发明涉及一种芯片嵌入式印刷电路板及其制造方法，其特征在于，提供一种芯片嵌入式印刷电路基板， 嵌入绝缘层中的第一芯片和第二芯片，并且在其一个表面上分别暴露于绝缘层的上表面和下表面的焊盘; 形成在绝缘层的上表面上以连接到第一芯片的焊盘和通孔的上部图案; 以及形成在绝缘层的下表面上以连接到第二芯片的焊盘和通孔的下图案。 另外，本发明提供一种嵌入式芯片的印刷电路板的制造方法。

公开(公告)号：US20070241441A1

公开(公告)日：2007-10-18

申请号：US11379018

申请日：2006-04-17

申请人： Sungwon Choi ,  Tae Sung Jeong

发明人： Sungwon Choi ,  Tae Sung Jeong

IPC分类号： H01L23/02

CPC分类号： H01L25/105 ,  H01L23/13 ,  H01L23/49816 ,  H01L24/73 ,  H01L25/0652 ,  H01L25/0655 ,  H01L2224/0401 ,  H01L2224/06136 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/4824 ,  H01L2224/73204 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15321 ,  H01L2924/15331 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： A multichip package system is provided forming a first substrate having a first side, a second side, and a first opening, connecting a first integrated circuit die to the first substrate through the first opening, connecting a second integrated circuit die on the first substrate, and encapsulating the first integrated die and second integrated circuit die on the first substrate.

摘要翻译： 提供了一种多芯片封装系统，其形成具有第一侧面，第二侧面和第一开口的第一基板，通过第一开口将第一集成电路管芯连接到第一基板，将第二集成电路管芯连接在第一基板上， 以及将所述第一集成管芯和第二集成电路管芯封装在所述第一衬底上。

公开(公告)号：US08351215B2

公开(公告)日：2013-01-08

申请号：US12320523

申请日：2009-01-28

申请人： Hong Won Kim ,  Sung Yi ,  Tae Sung Jeong ,  Joon Seok Kang

发明人： Hong Won Kim ,  Sung Yi ,  Tae Sung Jeong ,  Joon Seok Kang

IPC分类号： H05K3/00

CPC分类号： H05K1/185 ,  H01L23/5389 ,  H01L24/24 ,  H01L24/82 ,  H01L2224/24226 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2224/82039 ,  H01L2224/82047 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H05K2201/0355 ,  H05K2201/0394 ,  H05K2201/10674 ,  H05K2203/1469 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49146 ,  Y10T29/49147 ,  Y10T29/49155

摘要： The present invention relates to a chip embedded printed circuit board and a manufacturing method thereof. The present invention provides the chip embedded printed circuit board including an insulating layer embedding a chip provided with posts at an upper part, vias formed through the insulating layer, upper patterns formed at the upper part of the insulating layer to be connected to the posts and the vias and lower patterns formed at a lower part of the insulating layer to be connected to the vias, and the manufacturing method thereof.

摘要翻译： 芯片嵌入式印刷电路板及其制造方法技术领域本发明涉及一种嵌入式芯片的印刷电路板及其制造方法。 本发明提供了一种芯片嵌入式印刷电路板，其包括嵌入在上部设置有柱的芯片的绝缘层，通过绝缘层形成的通孔，形成在要连接到柱的绝缘层的上部的上部图案， 形成在绝缘层的与通孔连接的下部的通孔和下部图案及其制造方法。

公开(公告)号：US08802999B2

公开(公告)日：2014-08-12

申请号：US13478802

申请日：2012-05-23

申请人： Jong In Ryu ,  Yul Kyo Chung ,  Tae Sung Jeong

发明人： Jong In Ryu ,  Yul Kyo Chung ,  Tae Sung Jeong

IPC分类号： H05K1/09

CPC分类号： H05K1/185 ,  H01L24/19 ,  H01L2224/04105 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2924/12042 ,  H01L2924/19105 ,  H05K3/3436 ,  H05K2201/10477 ,  H05K2203/1461 ,  H01L2924/00

摘要： An embedded printed circuit board (PCB) includes: a copper foil laminate; an internal electronic component inserted into the copper foil laminate; a first circuit pattern formed on a surface of the internal electronic component; and a second circuit pattern formed on the copper foil laminate.

摘要翻译： 嵌入式印刷电路板（PCB）包括：铜箔层压板; 插入铜箔层压体中的内部电子部件; 形成在所述内部电子部件的表面上的第一电路图案; 以及形成在铜箔层叠体上的第二电路图案。

公开(公告)号：US20110083892A1

公开(公告)日：2011-04-14

申请号：US12631578

申请日：2009-12-04

申请人： Hong Bok WE ,  Tae Sung Jeong ,  Dae Jun Kim

发明人： Hong Bok WE ,  Tae Sung Jeong ,  Dae Jun Kim

IPC分类号： H05K1/18 ,  C23C14/48

CPC分类号： H05K1/185 ,  H01L23/5389 ,  H01L24/82 ,  H01L24/96 ,  H01L2224/04105 ,  H01L2224/32225 ,  H01L2224/83005 ,  H01L2224/83192 ,  H01L2224/92144 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0106 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/3011 ,  H01L2924/3511 ,  H05K3/005 ,  H05K3/4602 ,  H05K2201/10674 ,  H05K2203/0108 ,  H01L2924/00

摘要： Disclosed is an electronic component-embedded printed circuit board, which includes an insulating base, an insulating layer formed on one surface of the insulating base, an electronic component embedded in the insulating layer so that an active surface of the electronic component having a connection terminal faces the insulating base, a trench formed in the insulating base to expose the connection terminal, and a connection pattern formed and embedded in the trench, and in which the embedded connection pattern is finely formed by an imprinting process and is connected to the connection terminal of the electronic to component, thus obviating a need for an additional redistribution layer and reducing the manufacturing cost. A method of manufacturing such a printed circuit board is also provided.

摘要翻译： 公开了一种电子部件嵌入式印刷电路板，其包括绝缘基底，形成在绝缘基底的一个表面上的绝缘层，嵌入在绝缘层中的电子部件，使得电子部件的有源表面具有连接端子 面对绝缘基底，形成在绝缘基底中以暴露连接端子的沟槽以及形成并嵌入沟槽中的连接图案，并且其中嵌入式连接图案通过压印过程精细地形成并连接到连接端子 的电子元件，从而避免需要额外的再分配层并降低制造成本。 还提供了制造这种印刷电路板的方法。