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公开(公告)号：US20190259689A1
公开(公告)日：2019-08-22
申请号：US15899049
申请日：2018-02-19
IPC分类号： H01L23/495 , H01L23/498 , H05K1/02
摘要： A method of fabricating an integrated circuit package having improved heat dissipation is described. A re-routable clip is provided having a central portion and a plurality of leads surrounding the central portion. A die is attached to an underside of the central portion of the re-routable clip. The die and the leads of the re-routable clip are attached to a substrate. The die and the leads are encapsulated with a mold compound wherein a top surface of the central portion of the re-routable clip is exposed by the mold compound. The substrate is connected to a printed circuit board wherein thermal pathways are formed 1) from the die downward to the substrate to the printed circuit board and 2) from the die upward to the re-routable clip and then downward through the leads to the substrate and to the printed circuit board.
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公开(公告)号：US11532489B2
公开(公告)日：2022-12-20
申请号：US17345174
申请日：2021-06-11
发明人： Ernesto Gutierrez, III , Jesus Mennen Belonio, Jr. , Eric Hu , Melvin Martin , Jerry Li , Francisco Vergara Cadacio
IPC分类号： H01L21/48 , H01L25/16 , H01L23/00 , H01L23/498 , H01L23/31 , H01L25/065 , H01L23/538 , H01L21/683
摘要： A substrate is provided having a top side and a bottom side, having redistribution layers therein, having at least one copper pillar connected to the redistribution layers on the top side and at least one copper pillar connected to the redistribution layers on the bottom side, and having at least one cavity extending partially into the bottom side of the substrate. At least one passive component is mounted onto the copper pillar on the top side and embedded in a molding compound. At least one silicon die is mounted in the cavity wherein electrical connections are made between the at least one silicon die and the at least one passive component through the redistribution layers. At least one solder ball is mounted on the at least one copper pillar on the bottom side of the substrate to provide package output.
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公开(公告)号：US10332864B2
公开(公告)日：2019-06-25
申请号：US15367694
申请日：2016-12-02
IPC分类号： H01L25/07 , H01L23/49 , H01L23/492 , H01L23/495 , H01L23/00 , H01L23/482 , H01L25/00 , H01L25/18
摘要： An integrated circuit IC package with one or more pins protruding from the IC package for electrically connecting the IC package with a printed circuit board PCB is presented. The IC package has a first die with a first electronic component, a second die with a second electronic component, and a conductive plate having a plane surface. The first electronic component may be a semiconductor power device and the second electronic component may be a control circuit. The plane surface of the conductive plate is electrically connected to both a plane surface of the first die and one or more pins such that an electrical connection is established between the first die and the one or more pins. The second die may be arranged on top of the conductive plate. Alternatively, a third die with a third electronic component may be arranged on top of the conductive plate.
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公开(公告)号：US11309255B2
公开(公告)日：2022-04-19
申请号：US16830689
申请日：2020-03-26
发明人： Jesus Mennen Belonio, Jr. , Shou Cheng Eric Hu , Ian Kent , Ernesto Gutierrez, III , Melvin Martin , Rajesh Subraya Aiyandra
IPC分类号： H01L23/538 , H01L23/498 , H01L21/48 , H01L21/56 , H01L23/50 , H01L23/00 , H01L23/31
摘要： A system in package is provided comprising an embedded trace substrate having redistribution layers therein, at least one passive component mounted on one side of the embedded trace substrate and embedded in a first molding compound, at least one silicon die mounted on an opposite side of the embedded trace substrate and embedded in a second molding compound wherein electrical connections are made between the at least one silicon die and the at least one passive component through the redistribution layers, and solder balls mounted through openings in the second molding layer to the redistribution layers wherein the solder balls provide package output.
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公开(公告)号：US10410996B2
公开(公告)日：2019-09-10
申请号：US15367694
申请日：2016-12-02
IPC分类号： H01L25/07 , H01L23/49 , H01L23/495 , H01L23/00 , H01L23/482 , H01L25/00 , H01L25/18 , H01L23/492
摘要： An integrated circuit IC package with one or more pins protruding from the IC package for electrically connecting the IC package with a printed circuit board PCB is presented. The IC package has a first die with a first electronic component, a second die with a second electronic component, and a conductive plate having a plane surface. The first electronic component may be a semiconductor power device and the second electronic component may be a control circuit. The plane surface of the conductive plate is electrically connected to both a plane surface of the first die and one or more pins such that an electrical connection is established between the first die and the one or more pins. The second die may be arranged on top of the conductive plate. Alternatively, a third die with a third electronic component may be arranged on top of the conductive plate.
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公开(公告)号：US11075167B2
公开(公告)日：2021-07-27
申请号：US16265009
申请日：2019-02-01
发明人： Ernesto Gutierrez, III , Jesus Mennen Belonio, Jr. , Eric Hu , Melvin Martin , Jerry Li , Francisco Vergara Cadacio
IPC分类号： H01L23/48 , H01L23/538 , H01L21/48 , H01L25/16 , H01L23/00 , H01L23/498 , H01L23/31 , H01L25/065
摘要： A substrate is provided having a top side and a bottom side, having redistribution layers therein, having at least one copper pillar connected to the redistribution layers on the top side and at least one copper pillar connected to the redistribution layers on the bottom side, and having at least one cavity extending partially into the bottom side of the substrate. At least one passive component is mounted onto the copper pillar on the top side and embedded in a molding compound. At least one silicon die is mounted in the cavity wherein electrical connections are made between the at least one silicon die and the at least one passive component through the redistribution layers. At least one solder ball is mounted on the at least one copper pillar on the bottom side of the substrate to provide package output.
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公开(公告)号：US20180158804A1
公开(公告)日：2018-06-07
申请号：US15367694
申请日：2016-12-02
IPC分类号： H01L25/07 , H01L23/492 , H01L23/495 , H01L23/00 , H01L23/482 , H01L25/00 , H01L23/367 , H01L25/18
CPC分类号： H01L25/072 , H01L23/482 , H01L23/492 , H01L23/49524 , H01L23/49555 , H01L23/49562 , H01L23/49575 , H01L24/32 , H01L24/45 , H01L24/48 , H01L25/18 , H01L25/50 , H01L2224/32245 , H01L2224/45144 , H01L2224/45147 , H01L2224/48096 , H01L2224/48106 , H01L2224/48247 , H01L2924/01047 , H01L2924/01079 , H01L2924/10161 , H01L2924/1302 , H01L2924/1305 , H01L2924/13055 , H01L2924/13091 , H01L2924/1425 , H01L2924/17724 , H01L2924/17738 , H01L2924/17747 , H01L2924/19105 , H01L2924/00014
摘要： An integrated circuit IC package with one or more pins protruding from the IC package for electrically connecting the IC package with a printed circuit board PCB is presented. The IC package has a first die with a first electronic component, a second die with a second electronic component, and a conductive plate having a plane surface. The first electronic component may be a semiconductor power device and the second electronic component may be a control circuit. The plane surface of the conductive plate is electrically connected to both a plane surface of the first die and one or more pins such that an electrical connection is established between the first die and the one or more pins. The second die may be arranged on top of the conductive plate. Alternatively, a third die with a third electronic component may be arranged on top of the conductive plate.
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8.发明申请公开(公告)号：US20180025965A1
公开(公告)日：2018-01-25
申请号：US15213559
申请日：2016-07-19
发明人： Baltazar Canete, JR. , Melvin Martin , Ian Kent , Jesus Mennen Belonio, JR. , Rajesh Subraya Aiyandra
IPC分类号： H01L23/495 , H01L23/367 , H01L25/065 , H01L21/56 , H01L25/00 , H01L25/18 , H01L23/00 , H01L21/48
CPC分类号： H01L23/49575 , H01L21/4825 , H01L21/4828 , H01L21/4842 , H01L21/563 , H01L21/565 , H01L23/49503 , H01L23/4952 , H01L23/49548 , H01L24/13 , H01L24/16 , H01L24/17 , H01L24/29 , H01L24/32 , H01L24/73 , H01L24/81 , H01L24/92 , H01L2224/131 , H01L2224/13147 , H01L2224/16145 , H01L2224/16245 , H01L2224/16265 , H01L2224/17505 , H01L2224/2919 , H01L2224/32245 , H01L2224/73104 , H01L2224/73204 , H01L2224/73253 , H01L2224/81191 , H01L2224/81192 , H01L2224/92125 , H01L2224/92242 , H01L2924/14 , H01L2924/15153 , H01L2924/18161 , H01L2924/19011 , H01L2924/19103 , H01L2924/19104 , H01L2924/014 , H01L2924/00014
摘要： A quad flat no lead package is provided comprising at least one first integrated circuit die embedded in a recess in a die paddle of a metal leadframe and a second integrated circuit chip die attached to the at least one first integrated circuit die wherein the first and second integrated circuit dies are electrically connected to each other and wherein the second integrated circuit die is connected to leads of the leadframe through copper pillars.
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公开(公告)号：US20210305167A1
公开(公告)日：2021-09-30
申请号：US17345174
申请日：2021-06-11
发明人： Ernesto Gutierrez, III , Jesus Mennen Belonio , Eric Hu , Melvin Martin , Jerry Li , Francisco Vergara Cadacio
IPC分类号： H01L23/538 , H01L21/48 , H01L25/16 , H01L23/00 , H01L23/498 , H01L23/31 , H01L25/065
摘要： A substrate is provided having a top side and a bottom side, having redistribution layers therein, having at least one copper pillar connected to the redistribution layers on the top side and at least one copper pillar connected to the redistribution layers on the bottom side, and having at least one cavity extending partially into the bottom side of the substrate. At least one passive component is mounted onto the copper pillar on the top side and embedded in a molding compound. At least one silicon die is mounted in the cavity wherein electrical connections are made between the at least one silicon die and the at least one passive component through the redistribution layers. At least one solder ball is mounted on the at least one copper pillar on the bottom side of the substrate to provide package output.
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公开(公告)号：US20200251350A1
公开(公告)日：2020-08-06
申请号：US16265009
申请日：2019-02-01
发明人： Ernesto Gutierrez, III , Jesus Mennen Belonio, JR. , Eric Hu , Melvin Martin , Jerry Li , Francisco Vergara Cadacio
IPC分类号： H01L21/48 , H01L25/16 , H01L23/498 , H01L23/00
摘要： A substrate is provided having a top side and a bottom side, having redistribution layers therein, having at least one copper pillar connected to the redistribution layers on the top side and at least one copper pillar connected to the redistribution layers on the bottom side, and having at least one cavity extending partially into the bottom side of the substrate. At least one passive component is mounted onto the copper pillar on the top side and embedded in a molding compound. At least one silicon die is mounted in the cavity wherein electrical connections are made between the at least one silicon die and the at least one passive component through the redistribution layers. At least one solder ball is mounted on the at least one copper pillar on the bottom side of the substrate to provide package output.
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