公开(公告)号：US10727174B2

公开(公告)日：2020-07-28

申请号：US16131721

申请日：2018-09-14

申请人： Dialog Semiconductor (UK) Limited

发明人： Jesus Mennen Belonio, Jr. ,  Shou Cheng Eric Hu ,  Ernesto Gutierrez, III ,  Jerry Li

IPC分类号： H01L23/495 ,  H01L23/498 ,  H01L23/31 ,  H01L23/544 ,  H01L21/48 ,  H01L21/56

摘要： A method for forming a wafer level chip scale package begins with providing an integrated circuit wafer. Applying a dielectric material to the surface of the integrated circuit wafer. A redistribution conductive layer is formed upon the dielectric material to make contact with the input/output contacts of the integrated circuit. A polymer-based film is applied to the surface of the integrated circuit wafer and is subjected to a compression molding process. Alignment marks are placed on the edge of the integrated circuit wafer. A laser ablation process is implemented to prepare through mold via (TMV) in the cured thermoset plastic material. The solder ball or copper pillar input/output connector is placed in the through mold via (TMV). A reflow process is instigated to connect the input/output connector to the redistribution conductive layer's pad surface.

公开(公告)号：US20200091051A1

公开(公告)日：2020-03-19

申请号：US16131721

申请日：2018-09-14

申请人： Dialog Semiconductor (UK) Limited

发明人： Jesus Mennen Belonio, JR. ,  Shou Cheng Eric Hu ,  Ernesto Gutierrez, III ,  Jerry LI

IPC分类号： H01L23/498 ,  H01L23/31 ,  H01L23/544 ,  H01L21/56 ,  H01L21/48

摘要： A method for forming a wafer level chip scale package begins with providing an integrated circuit wafer. Applying a dielectric material to the surface of the integrated circuit wafer. A redistribution conductive layer is formed upon the dielectric material to make contact with the input/output contacts of the integrated circuit. A polymer-based film is applied to the surface of the integrated circuit wafer and is subjected to a compression molding process. Alignment marks are placed on the edge of the integrated circuit wafer. A laser ablation process is implemented to prepare through mold via (TMV) in the cured thermoset plastic material. The solder ball or copper pillar input/output connector is placed in the through mold via (TMV). A reflow process is instigated to connect the input/output connector to the redistribution conductive layer's pad surface.

公开(公告)号：US11309255B2

公开(公告)日：2022-04-19

申请号：US16830689

申请日：2020-03-26

申请人： Dialog Semiconductor (UK) Limited

发明人： Jesus Mennen Belonio, Jr. ,  Shou Cheng Eric Hu ,  Ian Kent ,  Ernesto Gutierrez, III ,  Melvin Martin ,  Rajesh Subraya Aiyandra

IPC分类号： H01L23/538 ,  H01L23/498 ,  H01L21/48 ,  H01L21/56 ,  H01L23/50 ,  H01L23/00 ,  H01L23/31

摘要： A system in package is provided comprising an embedded trace substrate having redistribution layers therein, at least one passive component mounted on one side of the embedded trace substrate and embedded in a first molding compound, at least one silicon die mounted on an opposite side of the embedded trace substrate and embedded in a second molding compound wherein electrical connections are made between the at least one silicon die and the at least one passive component through the redistribution layers, and solder balls mounted through openings in the second molding layer to the redistribution layers wherein the solder balls provide package output.

公开(公告)号：US10083926B1

公开(公告)日：2018-09-25

申请号：US15840842

申请日：2017-12-13

申请人： Dialog Semiconductor (UK) Limited

发明人： Ian Kent ,  Rajesh Subraya Aiyandra ,  Jesus Mennen Belonio, Jr. ,  Habeeb Mohiuddin Mohammed ,  Domingo Jr. Maggay ,  Robert Lamoon ,  Ernesto Gutierrez, III

IPC分类号： H01L23/52 ,  H01L21/44 ,  H01L23/00

CPC分类号： H01L24/04 ,  H01L23/3142 ,  H01L23/3192 ,  H01L23/562 ,  H01L24/02 ,  H01L24/05 ,  H01L24/13 ,  H01L2224/02313 ,  H01L2224/02321 ,  H01L2224/0235 ,  H01L2224/02351 ,  H01L2224/0236 ,  H01L2224/02373 ,  H01L2224/02375 ,  H01L2224/02381 ,  H01L2224/0239 ,  H01L2224/024 ,  H01L2224/0401 ,  H01L2224/13024 ,  H01L2224/94 ,  H01L2924/01029 ,  H01L2924/06 ,  H01L2224/03

摘要： A wafer level chip scale package is described. At least one redistribution layer is connected to a wafer through an opening through a first polymer layer to a metal pad on a top surface of the wafer wherein the redistribution layer has a roughened top surface and wherein holes are formed through the at least one redistribution layer in an area where the redistribution layer has an area exceeding 0.2 mm2. At least one UBM layer contacts the at least one redistribution layer through an opening in a second polymer layer wherein the second polymer layer contacts the first polymer layer within the holes promoting cohesion between the first and second polymer layers and wherein the roughened top surface promotes adhesion between the at least one redistribution layer and the second polymer layer.

公开(公告)号：US12100674B2

公开(公告)日：2024-09-24

申请号：US17577178

申请日：2022-01-17

申请人： Dialog Semiconductor (UK) Limited

发明人： Ernesto Gutierrez, III ,  Jesus Mennen Belonio, Jr. ,  Shou Cheng Eric Hu

IPC分类号： H01L23/64 ,  H01L21/56 ,  H01L21/768 ,  H01L21/78 ,  H01L23/00 ,  H01L23/31 ,  H01L23/498 ,  H01L23/522 ,  H01L23/532 ,  H01L23/538

CPC分类号： H01L23/647 ,  H01L21/56 ,  H01L21/76877 ,  H01L21/78 ,  H01L23/3128 ,  H01L23/49822 ,  H01L23/5226 ,  H01L23/53228 ,  H01L23/5389 ,  H01L23/642 ,  H01L24/14 ,  H01L24/19 ,  H01L24/20 ,  H01L2224/0239 ,  H01L2224/16225 ,  H01L2224/18 ,  H01L2924/01029 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19015 ,  H01L2924/19105 ,  H01L2924/3511 ,  H01L2924/3511 ,  H01L2924/00 ,  H01L2924/181 ,  H01L2924/00012

摘要： A panel type fan-out wafer level package with embedded film type capacitors and resistors is described. The package comprises a silicon die at a bottom of the package wherein a top side and lateral sides of the silicon die are encapsulated in a molding compound, at least one redistribution layer connected to the silicon die through copper posts contacting a top side of the silicon die, at least one embedded capacitor material (ECM) sheet laminated onto the package, and at least one embedded resistor-conductor material (RCM) sheet laminated onto the package wherein the at least one redistribution layer, capacitors in the at least one ECM, and resistors in the at least one RCM are electrically interconnected.

公开(公告)号：US11532489B2

公开(公告)日：2022-12-20

申请号：US17345174

申请日：2021-06-11

申请人： Dialog Semiconductor (UK) Limited

发明人： Ernesto Gutierrez, III ,  Jesus Mennen Belonio, Jr. ,  Eric Hu ,  Melvin Martin ,  Jerry Li ,  Francisco Vergara Cadacio

IPC分类号： H01L21/48 ,  H01L25/16 ,  H01L23/00 ,  H01L23/498 ,  H01L23/31 ,  H01L25/065 ,  H01L23/538 ,  H01L21/683

摘要： A substrate is provided having a top side and a bottom side, having redistribution layers therein, having at least one copper pillar connected to the redistribution layers on the top side and at least one copper pillar connected to the redistribution layers on the bottom side, and having at least one cavity extending partially into the bottom side of the substrate. At least one passive component is mounted onto the copper pillar on the top side and embedded in a molding compound. At least one silicon die is mounted in the cavity wherein electrical connections are made between the at least one silicon die and the at least one passive component through the redistribution layers. At least one solder ball is mounted on the at least one copper pillar on the bottom side of the substrate to provide package output.

公开(公告)号：US20190139911A1

公开(公告)日：2019-05-09

申请号：US15802873

申请日：2017-11-03

申请人： Dialog Semiconductor (UK) Limited

发明人： Ernesto Gutierrez, III ,  Jesus Mennen Belonio, JR. ,  Shou Cheng Eric Hu

IPC分类号： H01L23/64 ,  H01L23/522 ,  H01L23/532 ,  H01L23/00 ,  H01L21/78 ,  H01L21/56 ,  H01L21/768

摘要： A panel type fan-out wafer level package with embedded film type capacitors and resistors is described. The package comprises a silicon die at a bottom of the package wherein a top side and lateral sides of the silicon die are encapsulated in a molding compound, at least one redistribution layer connected to the silicon die through copper posts contacting a top side of the silicon die, at least one embedded capacitor material (ECM) sheet laminated onto the package, and at least one embedded resistor-conductor material (RCM) sheet laminated onto the package wherein the at least one redistribution layer, capacitors in the at least one ECM, and resistors in the at least one RCM are electrically interconnected.

公开(公告)号：US20210305167A1

公开(公告)日：2021-09-30

申请号：US17345174

申请日：2021-06-11

申请人： Dialog Semiconductor (UK) Limited

发明人： Ernesto Gutierrez, III ,  Jesus Mennen Belonio ,  Eric Hu ,  Melvin Martin ,  Jerry Li ,  Francisco Vergara Cadacio

IPC分类号： H01L23/538 ,  H01L21/48 ,  H01L25/16 ,  H01L23/00 ,  H01L23/498 ,  H01L23/31 ,  H01L25/065

摘要： A substrate is provided having a top side and a bottom side, having redistribution layers therein, having at least one copper pillar connected to the redistribution layers on the top side and at least one copper pillar connected to the redistribution layers on the bottom side, and having at least one cavity extending partially into the bottom side of the substrate. At least one passive component is mounted onto the copper pillar on the top side and embedded in a molding compound. At least one silicon die is mounted in the cavity wherein electrical connections are made between the at least one silicon die and the at least one passive component through the redistribution layers. At least one solder ball is mounted on the at least one copper pillar on the bottom side of the substrate to provide package output.

公开(公告)号：US20200251350A1

公开(公告)日：2020-08-06

申请号：US16265009

申请日：2019-02-01

申请人： Dialog Semiconductor (UK) Limited

发明人： Ernesto Gutierrez, III ,  Jesus Mennen Belonio, JR. ,  Eric Hu ,  Melvin Martin ,  Jerry Li ,  Francisco Vergara Cadacio

IPC分类号： H01L21/48 ,  H01L25/16 ,  H01L23/498 ,  H01L23/00

摘要： A substrate is provided having a top side and a bottom side, having redistribution layers therein, having at least one copper pillar connected to the redistribution layers on the top side and at least one copper pillar connected to the redistribution layers on the bottom side, and having at least one cavity extending partially into the bottom side of the substrate. At least one passive component is mounted onto the copper pillar on the top side and embedded in a molding compound. At least one silicon die is mounted in the cavity wherein electrical connections are made between the at least one silicon die and the at least one passive component through the redistribution layers. At least one solder ball is mounted on the at least one copper pillar on the bottom side of the substrate to provide package output.

公开(公告)号：US20200227356A1

公开(公告)日：2020-07-16

申请号：US16830689

申请日：2020-03-26

申请人： Dialog Semiconductor (UK) Limited

发明人： Jesus Mennen Belonio, JR. ,  Shou Cheng Eric Hu ,  Ian Kent ,  Ernesto Gutierrez, III ,  Melvin Martin ,  Rajesh Subraya Aiyandra

IPC分类号： H01L23/538 ,  H01L23/498 ,  H01L21/48 ,  H01L21/56

摘要： A system in package is provided comprising an embedded trace substrate having redistribution layers therein, at least one passive component mounted on one side of the embedded trace substrate and embedded in a first molding compound, at least one silicon die mounted on an opposite side of the embedded trace substrate and embedded in a second molding compound wherein electrical connections are made between the at least one silicon die and the at least one passive component through the redistribution layers, and solder balls mounted through openings in the second molding layer to the redistribution layers wherein the solder balls provide package output.