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    ROTATING DEVICE TO CHANGE LIGHTING ANGLE
    3.
    发明申请
    ROTATING DEVICE TO CHANGE LIGHTING ANGLE 审中-公开
    旋转装置改变照明角度

    公开(公告)号：US20130107537A1

    公开(公告)日：2013-05-02

    申请号：US13286618

    申请日：2011-11-01

    Applicant: Chien-Kuo Lee ,  Ching-Tai Lu ,  Po-Cheng Huang ,  Yi-Cheng Su

    Inventor： Chien-Kuo Lee ,  Ching-Tai Lu ,  Po-Cheng Huang ,  Yi-Cheng Su

    IPC: F21V21/14

    CPC classification number: F21K9/275 ,  F21K9/272 ,  F21K9/65 ,  F21V21/30 ,  F21Y2103/10 ,  F21Y2115/10

    Abstract: A lamp rotating device to change a lighting angle includes a light tube, a lighting module, two fixed ends and two rotating parts, an open is on both ends of the light tube, two fixed ends each is installed on one open, each of the rotating part is installed between the fixed end and the open respectively, one side of the rotating part interferes with light tube to have the light tube rotate along the fixed end by the movements of rotating part, and change a lighting angle.

    Abstract translation: 用于改变照明角度的灯旋转装置包括光管，照明模块，两个固定端和两个旋转部分，在光管的两端开放，两个固定端各自安装在一个开口上，每个 旋转部件分别安装在固定端和开口之间，旋转部分的一侧干涉灯管，使光管沿着固定端部由旋转部件的运动旋转，并改变点灯角度。

    SEMICONDUCTOR DEVICE HAVING METAL GATE AND MANUFACTURING METHOD THEREOF
    4.
    发明申请
    SEMICONDUCTOR DEVICE HAVING METAL GATE AND MANUFACTURING METHOD THEREOF 审中-公开
    具有金属门的半导体器件及其制造方法

    公开(公告)号：US20120098043A1

    公开(公告)日：2012-04-26

    申请号：US12911714

    申请日：2010-10-25

    Applicant: Ya-Hsueh Hsieh ,  Teng-Chun Tsai ,  Chia-Hsi Chen ,  Cheng-Huei Chang ,  Po-Cheng Huang ,  Hsin-Kuo Hsu

    Inventor： Ya-Hsueh Hsieh ,  Teng-Chun Tsai ,  Chia-Hsi Chen ,  Cheng-Huei Chang ,  Po-Cheng Huang ,  Hsin-Kuo Hsu

    IPC: H01L29/78 ,  H01L21/28

    CPC classification number: H01L29/66545 ,  H01L21/823842 ,  H01L21/823871 ,  H01L29/49 ,  H01L29/66606 ,  H01L29/7833

    Abstract: A method of manufacturing a semiconductor device having metal gate includes providing a substrate having a semiconductor device and a contact etch stop layer (CESL) and a dielectric layer covering the semiconductor device formed thereon, wherein the semiconductor device having at least a dummy gate, performing a dummy gate removal step to form at least an opening in the semiconductor device and to simultaneously remove a portion of the CESL such that a top surface of the CESL is lower than the semiconductor device and the dielectric layer and a plurality of recesses is obtained, and performing a recess elimination step to form a substantially even surface of the dielectric layer.

    Abstract translation: 一种制造具有金属栅极的半导体器件的方法包括提供具有半导体器件和接触蚀刻停止层（CESL）的衬底和覆盖其上形成的半导体器件的电介质层，其中至少具有虚拟栅极的半导体器件执行 模拟栅极去除步骤，以在半导体器件中形成至少一个开口，并且同时去除CESL的一部分，使得CESL的顶表面比半导体器件和电介质层低，并且获得多个凹槽， 并执行凹陷消除步骤以形成电介质层的基本均匀的表面。

    Semiconductor process
    5.
    发明授权
    Semiconductor process 有权
    半导体工艺

    公开(公告)号：US08647986B2

    公开(公告)日：2014-02-11

    申请号：US13220692

    申请日：2011-08-30

    Applicant: Po-Cheng Huang ,  Teng-Chun Tsai ,  Chia-Lin Hsu ,  Chun-Wei Hsu ,  Yen-Ming Chen ,  Chih-Hsun Lin ,  Chang-Hung Kung

    Inventor： Po-Cheng Huang ,  Teng-Chun Tsai ,  Chia-Lin Hsu ,  Chun-Wei Hsu ,  Yen-Ming Chen ,  Chih-Hsun Lin ,  Chang-Hung Kung

    IPC: H01L21/306 ,  H01L21/321 ,  H01L21/3105 ,  H01L21/768

    CPC classification number: H01L21/3212 ,  H01L21/3105 ,  H01L21/31051 ,  H01L21/31053 ,  H01L21/7684 ,  H01L21/823835 ,  H01L29/665

    Abstract: A semiconductor process includes the following steps. A first gate structure and a second gate structure are formed on a substrate, wherein the top of the first gate structure includes a cap layer, so that the vertical height of the first gate structure is higher than the vertical height of the second gate structure. An interdielectric layer is formed on the substrate. A first chemical mechanical polishing process is performed to expose the top surface of the cap layer. A second chemical mechanical polishing process is performed to expose the top surface of the second gate structure or an etching process is performed to remove the interdielectric layer located on the second gate structure. A second chemical mechanical polishing process is then performed to remove the cap layer.

    Abstract translation: 半导体工艺包括以下步骤。 第一栅极结构和第二栅极结构形成在基板上，其中第一栅极结构的顶部包括盖层，使得第一栅极结构的垂直高度高于第二栅极结构的垂直高度。 在基板上形成介电层。 执行第一化学机械抛光工艺以暴露盖层的顶表面。 执行第二化学机械抛光工艺以暴露第二栅极结构的顶表面，或执行蚀刻工艺以去除位于第二栅极结构上的介电层。 然后执行第二化学机械抛光工艺以除去盖层。

    Virtual I/O device coupled to memory controller
    7.
    发明授权
    Virtual I/O device coupled to memory controller 失效
    耦合到存储器控制器的虚拟I / O设备

    公开(公告)号：US06799231B2

    公开(公告)日：2004-09-28

    申请号：US10274884

    申请日：2002-10-22

    Applicant: Ching-Ju Hsin ,  Kwang-Lay Chen ,  Po-Cheng Huang ,  Pao-Hsuan Tseng ,  Ming-Chun Su ,  Tsung-Mong Shen

    Inventor： Ching-Ju Hsin ,  Kwang-Lay Chen ,  Po-Cheng Huang ,  Pao-Hsuan Tseng ,  Ming-Chun Su ,  Tsung-Mong Shen

    IPC: G06F1312

    CPC classification number: G06F13/4217

    Abstract: The invention relates to a virtual I/O device coupled to a memory controller in a microprocessor of computer, the virtual I/O device and a memory unit being in communication with the memory controller via a common interface so that any of a plurality of peripherals is capable of coupling to an arithmetic and logic unit (ALU) in the microprocessor via the virtual I/O device and the memory controller sequentially, and an excessive time spent on a processing of request and acknowledgement in handshake while packets being received or transmitted between a conventional I/O device and the I/O interface in the microprocessor is significantly reduced.

    Abstract translation: 本发明涉及耦合到计算机的微处理器中的存储器控​​制器的虚拟I / O设备，虚拟I / O设备和存储器单元通过公共接口与存储器控制器通信，使得多个外设 能够经由虚拟I / O设备和存储器控制器顺序地耦合到微处理器中的算术和逻辑单元（ALU），并且在握手中的请求和确认处理时花费的时间过长，而分组在 传统的I / O设备和微处理器中的I / O接口显着减少。

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