The invention relates to a virtual I/O device coupled to a memory controller in a microprocessor of computer, the virtual I/O device and a memory unit being in communication with the memory controller via a common interface so that any of a plurality of peripherals is capable of coupling to an arithmetic and logic unit (ALU) in the microprocessor via the virtual I/O device and the memory controller sequentially, and an excessive time spent on a processing of request and acknowledgement in handshake while packets being received or transmitted between a conventional I/O device and the I/O interface in the microprocessor is significantly reduced.