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    Semiconductor device with large blocking voltage and method of manufacturing the same
    1.
    发明授权
    Semiconductor device with large blocking voltage and method of manufacturing the same 有权
    具有大阻断电压的半导体器件及其制造方法

    公开(公告)号：US07772613B2

    公开(公告)日：2010-08-10

    申请号：US12533740

    申请日：2009-07-31

    Applicant: Haruka Shimizu ,  Natsuki Yokoyama

    Inventor： Haruka Shimizu ,  Natsuki Yokoyama

    IPC: H01L29/80

    CPC classification number: H01L29/0619 ,  H01L29/0661 ,  H01L29/1066 ,  H01L29/1608 ,  H01L29/66068 ,  H01L29/66909 ,  H01L29/8083

    Abstract: A normally-off type junction FET in which a channel resistance is reduced without lowering its blocking voltage is provided. In a junction FET formed with using a substrate made of silicon carbide, an impurity concentration of a channel region (second epitaxial layer) is made higher than an impurity concentration of a first epitaxial layer to be a drift layer. The channel region is formed of a first region in which a channel width is constant and a second region below the first region in which the channel width becomes wider toward the drain (substrate) side. A boundary between the first epitaxial layer and the second epitaxial layer is positioned in the second region in which the channel width becomes wider toward the drain (substrate) side.

    Abstract translation: 提供了其中通道电阻降低而不降低其阻断电压的常闭型结型FET。 在使用由碳化硅制成的衬底形成的结型FET中，使沟道区（第二外延层）的杂质浓度高于作为漂移层的第一外延层的杂质浓度。 沟道区域由沟道宽度恒定的第一区域和沟道宽度朝向漏极（衬底）侧变宽的第一区域下方的第二区域形成。 第一外延层和第二外延层之间的边界位于沟道宽度朝向漏极（基板）侧变宽的第二区域中。

    SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
    2.
    发明申请
    SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME 有权
    半导体器件及其制造方法

    公开(公告)号：US20100163935A1

    公开(公告)日：2010-07-01

    申请号：US12639054

    申请日：2009-12-16

    Applicant: Haruka Shimizu ,  Natsuki Yokoyama

    Inventor： Haruka Shimizu ,  Natsuki Yokoyama

    IPC: H01L29/808

    CPC classification number: H01L29/8083 ,  H01L29/42316 ,  H01L29/66068 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2924/13055 ,  H01L2924/00014 ,  H01L2924/00

    Abstract: In a junction FET of a normally-off type, a technique capable of achieving both of improvement of a blocking voltage and reduction of an ON resistance is provided. In a junction FET using silicon carbide as a substrate material, impurities are doped to a vicinity of a p-n junction between a gate region and a channel-formed region, the impurities having a conductive type which is reverse to that of impurities doped in the gate region and same as that of impurities doped in the channel-formed region. In this manner, an impurity profile of the p-n junction becomes abrupt, and further, an impurity concentration of a junction region forming the p-n junction with the gate region in the channel-formed region is higher than those of a center region in the channel-formed region and of an epitaxial layer.

    Abstract translation: 在常闭型的结型FET中，提供了能够实现阻断电压的提高和导通电阻的降低的技术。 在使用碳化硅作为衬底材料的接合FET中，杂质被掺杂到栅极区域和沟道形成区域之间的pn结附近，杂质具有与掺杂在栅极中的杂质相反的导电类型 区域和与在沟道形成区域中掺杂的杂质相同。 以这种方式，pn结的杂质分布变得突然，并且形成与沟道形成区域中的栅极区域的pn结的结区域的杂质浓度高于沟道形成区域中的中心区域的杂质浓度， 形成区域和外延层。

    Nonvolatile semiconductor memory device and manufacturing method thereof
    4.
    发明授权
    Nonvolatile semiconductor memory device and manufacturing method thereof 有权
    非易失性半导体存储器件及其制造方法

    公开(公告)号：US07115943B2

    公开(公告)日：2006-10-03

    申请号：US11013406

    申请日：2004-12-17

    Applicant: Toshiyuki Mine ,  Natsuki Yokoyama ,  Kan Yasui

    Inventor： Toshiyuki Mine ,  Natsuki Yokoyama ,  Kan Yasui

    IPC: H01L29/792

    CPC classification number: H01L21/28282 ,  H01L27/11568 ,  H01L29/792

    Abstract: A MONOS nonvolatile memory of a split gate structure, wherein writing and erasing are performed by hot electrons and hot holes respectively, is prone to cause electrons not to be erased and to remain in an Si nitride film on a select gate electrode sidewall and that results in the deterioration of rewriting durability. When long time erasing is applied as a measure to solve the problem, drawbacks appear, such as the increase of a circuit area caused by the increase of the erasing current and the deterioration of retention characteristics. In the present invention, an Si nitride film is formed by the reactive plasma sputter deposition method that enables oriented deposition and the Si nitride film on a select gate electrode sidewall is removed at the time when a top Si oxide film is formed.

    Abstract translation: 分离栅结构的MONOS非易失性存储器，其中由热电子和热孔分别执行写入和擦除容易导致电子不被擦除并且保留在选择栅极电极侧壁上的氮化硅膜中，并且结果 在改写耐久性的恶化。 当长时间擦除作为解决该问题的措施时，会出现缺点，例如由擦除电流的增加引起的电路面积的增加和保留特性的劣化。 在本发明中，通过能够进行取向沉积的反应等离子体溅射沉积方法形成氮化硅膜，并且在形成顶部Si氧化物膜时，在选择栅电极侧壁上除去Si氮化物膜。

    Semiconductor device and method for manufacturing thereof
    6.
    发明授权
    Semiconductor device and method for manufacturing thereof 有权
    半导体装置及其制造方法

    公开(公告)号：US06897104B2

    公开(公告)日：2005-05-24

    申请号：US10452126

    申请日：2003-06-03

    Applicant: Shimpei Tsujikawa ,  Toshiyuki Mine ,  Jiro Yugami ,  Natsuki Yokoyama ,  Tsuyoshi Yamauchi

    Inventor： Shimpei Tsujikawa ,  Toshiyuki Mine ,  Jiro Yugami ,  Natsuki Yokoyama ,  Tsuyoshi Yamauchi

    IPC: H01L21/316 ,  H01L21/318 ,  H01L21/8234 ,  H01L27/088 ,  H01L21/8238

    CPC classification number: H01L21/823857 ,  H01L21/823462

    Abstract: A semiconductor device and a method for manufacturing the same of forming a silicon nitride film selectively without giving damages or contaminations to a surface of the silicon substrate thereby forming different types of gate dielectrics in one identical silicon substrate, are obtained by forming a silicon dioxide on the surface of a silicon substrate, then removing a portion thereof, forming a silicon nitride film to the surface of the substrate from which the silicon dioxide has been removed and, simultaneously, introducing nitrogen to the surface of the silicon dioxide which is left not being removed or, alternatively, depositing a silicon dioxide on the surface of the silicon substrate by chemical vapor deposition, then removing a portion thereof, forming a silicon nitride film on the surface of a substrate from which the silicon dioxide has been removed, and, simultaneously, introducing nitrogen to the surface of the silicon dioxide left not being removed, successively, dissolving and removing nitrogen-introduced silicon oxide film to expose the surface of the substrate and oxidizing the exposed surface of the silicon substrate and the silicon nitride film.

    Abstract translation: 一种半导体器件及其制造方法，其选择性地形成氮化硅膜，而不会对硅衬底的表面造成损害或污染，从而在一个相同的硅衬底中形成不同类型的栅极电介质，通过在二氧化硅上形成二氧化硅 硅衬底的表面，然后去除其一部分，在已经除去二氧化硅的衬底的表面上形成氮化硅膜，同时将氮引入二氧化硅的不是 去除或者通过化学气相沉积在硅衬底的表面上沉积二氧化硅，然后去除其一部分，在去除二氧化硅的衬底的表面上形成氮化硅膜，同时 将氮气引入未被除去的二氧化硅的表面，依次溶解 并且移除氮导入的氧化硅膜以暴露衬底的表面并氧化硅衬底和氮化硅膜的暴露表面。

    Semiconductor device and method for manufacturing thereof
    8.
    发明申请
    Semiconductor device and method for manufacturing thereof 有权
    半导体装置及其制造方法

    公开(公告)号：US20050029600A1

    公开(公告)日：2005-02-10

    申请号：US10942014

    申请日：2004-09-16

    Applicant: Shimpei Tsujikawa ,  Toshiyuki Mine ,  Jiro Yugami ,  Natsuki Yokoyama ,  Tsuyoshi Yamauchi

    Inventor： Shimpei Tsujikawa ,  Toshiyuki Mine ,  Jiro Yugami ,  Natsuki Yokoyama ,  Tsuyoshi Yamauchi

    IPC: H01L21/316 ,  H01L21/318 ,  H01L21/8234 ,  H01L27/088 ,  H01L21/44 ,  H01L21/8238 ,  H01L29/76 ,  H01L31/062 ,  H01L31/119

    CPC classification number: H01L21/823857 ,  H01L21/823462

    Abstract: A semiconductor device and a method for manufacturing the same of forming a silicon nitride film selectively without giving damages or contaminations to a surface of the silicon substrate thereby forming different types of gate dielectrics in one identical silicon substrate, are obtained by forming a silicon dioxide on the surface of a silicon substrate, then removing a portion thereof, forming a silicon nitride film to the surface of the substrate from which the silicon dioxide has been removed and, simultaneously, introducing nitrogen to the surface of the silicon dioxide which is left not being removed or, alternatively, depositing a silicon dioxide on the surface of the silicon substrate by chemical vapor deposition, then removing a portion thereof, forming a silicon nitride film on the surface of a substrate from which the silicon dioxide has been removed, and, simultaneously, introducing nitrogen to the surface of the silicon dioxide left not being removed, successively, dissolving and removing nitrogen-introduced silicon oxide film to expose the surface of the substrate and oxidizing the exposed surface of the silicon substrate and the silicon nitride film

    Abstract translation: 一种半导体器件及其制造方法，其选择性地形成氮化硅膜，而不会对硅衬底的表面造成损害或污染，从而在一个相同的硅衬底中形成不同类型的栅极电介质，通过在二氧化硅上形成二氧化硅 硅衬底的表面，然后去除其一部分，在已经除去二氧化硅的衬底的表面上形成氮化硅膜，同时将氮引入二氧化硅的不是 去除或者通过化学气相沉积在硅衬底的表面上沉积二氧化硅，然后去除其一部分，在去除二氧化硅的衬底的表面上形成氮化硅膜，同时 将氮气引入未被除去的二氧化硅的表面，依次溶解 并且去除引入氮的氧化硅膜以暴露衬底的表面并氧化硅衬底和氮化硅膜的暴露表面

    MISFET semiconductor device having a high dielectric constant insulating film with tapered end portions
    9.
    发明授权
    MISFET semiconductor device having a high dielectric constant insulating film with tapered end portions 有权
    具有具有锥形端部的高介电常数绝缘膜的MISFET半导体器件

    公开(公告)号：US06710383B2

    公开(公告)日：2004-03-23

    申请号：US10005355

    申请日：2001-12-07

    Applicant: Jiro Yugami ,  Natsuki Yokoyama ,  Toshiyuki Mine ,  Yasushi Goto

    Inventor： Jiro Yugami ,  Natsuki Yokoyama ,  Toshiyuki Mine ,  Yasushi Goto

    IPC: H01L2976

    CPC classification number: H01L21/28194 ,  H01L21/28079 ,  H01L21/28114 ,  H01L21/28176 ,  H01L21/28185 ,  H01L21/823418 ,  H01L21/823425 ,  H01L21/823456 ,  H01L21/823462 ,  H01L29/42368 ,  H01L29/495 ,  H01L29/51 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518 ,  H01L29/78

    Abstract: There is provided a semiconductor device configured as follows. On a semiconductor substrate, a titanium oxide film which is an insulating film having a higher dielectric constant than that of a silicon dioxide film is formed as a gate insulating film, and a gate electrode is disposed thereon, resulting in a field effect transistor. The end portions in the gate length direction of the titanium oxide film are positioned inwardly from the respective end portions on the source side and on the drain side of the gate electrode, and the end portions of the titanium oxide film are positioned in a region in which the gate electrode overlaps with the source region and the drain region in plan configuration. This semiconductor device operates at a high speed, and is excellent in short channel characteristics and driving current. Further, in the semiconductor device, the amount of metallic elements introduced into a silicon substrate is small.

    Abstract translation: 提供如下配置的半导体器件。 在半导体衬底上形成作为绝缘膜的介电常数高于二氧化硅膜的氧化钛膜作为栅极绝缘膜，并且在其上设置栅电极，得到场效应晶体管。 氧化钛膜的栅极长度方向的端部位于栅电极的源极侧和漏极侧的各端部的内侧，氧化钛膜的端部位于 其中栅电极以平面构型与源区和漏区重叠。 该半导体器件以高速度工作，并且具有优异的短沟道特性和驱动电流。 此外，在半导体器件中，导入硅衬底的金属元素的量小。

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