Patent search ap:"Matthew J. Farinelli" Page 1

1.

发明申请
INTERPOSER STRUCTURES AND METHODS OF MANUFACTURING THE SAME 有权
Title translation: 中间件结构及其制造方法

公开(公告)号：US20100038126A1

公开(公告)日：2010-02-18

申请号：US12542935

申请日：2009-08-18

Applicant: Steven A. Cordes , Matthew J. Farinelli , Sherif A. Goma

Inventor： Steven A. Cordes , Matthew J. Farinelli , Sherif A. Goma

IPC: H05K1/11

CPC classification number: G01R1/0735 , G01R3/00 , H05K3/06 , H05K3/4007 , H05K3/4038

Abstract: Flexible and rigid interposers for use in the semiconductor industry and methods for manufacturing the same are described. Auto-catalytic processes are used to minimize the costs associated with the production of flexible interposers, while increasing the yield and lifetime. Electrical contact regions are easily isolated and the risk of corrosion is reduced because all portions of the interposer are plated at once. Leads projecting from the flexible portion of the interposers accommodate a greater variety of components to be tested. Rigid interposers include a pin projecting from a probe pad affixed to a substrate. The rigidity of the pin penetrates oxides on a contact pad to be tested. Readily available semiconductor materials and processes are used to manufacture the flexible and rigid interposers according to the invention. The flexible and rigid interposers can accommodate pitches down to 25 μm.

Abstract translation: 描述了用于半导体工业的柔性和刚性插入件及其制造方法。自动催化过程用于最小化与柔性插入物的生产相关的成本，同时提高产量和寿命。电接触区域容易隔离，并且由于插入器的所有部分一次镀覆，因此腐蚀的风险降低。从插入件的柔性部分突出的引线可容纳更多种待测试的部件。刚性插入件包括从固定到基板的探针垫突出的销。针的刚度穿过待测接触垫上的氧化物。易于使用的半导体材料和工艺用于制造根据本发明的柔性和刚性插入件。柔性和刚性插入件可以容纳低至25μm的间距。

2.

发明申请
Methods of Creating Molds of Variable Solder Volumes for Flip Attach 审中-公开
Title translation: 用于翻转附件的可变焊料体积模具的制造方法

公开(公告)号：US20090001248A1

公开(公告)日：2009-01-01

申请号：US11844070

申请日：2007-08-23

Applicant: Matthew J. Farinelli , Steven Cordes , Donna S. Nielsen , Samuel Roy McKnight , Jay S. Chey , Peter A. Gruber , Joanna Rosner

Inventor： Matthew J. Farinelli , Steven Cordes , Donna S. Nielsen , Samuel Roy McKnight , Jay S. Chey , Peter A. Gruber , Joanna Rosner

IPC: B22C9/00

CPC classification number: H05K3/3457 , H01L24/11 , H01L24/13 , H01L2224/11003 , H01L2224/1308 , H01L2224/13147 , H01L2224/13171 , H01L2924/01024 , H01L2924/01029 , H01L2924/01033 , H01L2924/014 , H01L2924/07802 , H01L2924/14 , H01L2924/15788 , H01L2924/181 , H05K2203/0113 , H05K2203/0338 , H01L2924/00

Abstract: A solder mold includes a substrate and a plurality of cavities for holding solder to be transferred to an integrated circuit. The plurality of cavities comprises cavities of at least two different volumes.

Abstract translation: 焊模包括基板和多个用于保持待传送到集成电路的焊料的空腔。多个空腔包括至少两个不同体积的空腔。

3.

发明授权
Metalized elastomeric electrical contacts 失效
Title translation: 金属化弹性电触头

公开(公告)号：US07452212B2

公开(公告)日：2008-11-18

申请号：US11718279

申请日：2005-09-30

Applicant: Gareth Geoffrey Hougham , Ali Afzali , Steven Allen Cordes , Paul W. Coteus , Matthew J. Farinelli , Sherif A. Goma , Alphonso P. Lanzetta , Daniel Peter Morris , Joanna Rosner , Nisha Yohannan

Inventor： Gareth Geoffrey Hougham , Ali Afzali , Steven Allen Cordes , Paul W. Coteus , Matthew J. Farinelli , Sherif A. Goma , Alphonso P. Lanzetta , Daniel Peter Morris , Joanna Rosner , Nisha Yohannan

IPC: H01R9/00

CPC classification number: H01R9/00 , B33Y80/00 , G01R1/06738 , G01R1/07314 , G01R3/00 , H01R13/2414 , H05K7/1061 , Y10T29/49002

Abstract: Techniques for forming enhanced electrical connections are provided. In one aspect, an electrical connecting device comprises an electrically insulating carrier having one or more contact structures traversing a plane thereof. Each contact structure comprises an elastomeric material having an electrically conductive layer running along at least one surface thereof continuously through the plane of the carrier.

Abstract translation: 提供了用于形成增强的电连接的技术。一方面，电连接装置包括具有穿过其平面的一个或多个接触结构的电绝缘载体。每个接触结构包括具有连续穿过载体平面的至少一个表面延伸的导电层的弹性体材料。

4.

发明授权
Techniques for improving bond pad performance 有权
Title translation: 提高粘结垫性能的技术

公开(公告)号：US08524596B2

公开(公告)日：2013-09-03

申请号：US13550105

申请日：2012-07-16

Applicant: Frederic Beaulieu , Gobinda Das , Steven J. Duda , Matthew J. Farinelli , Adreanne Kelly , Samuel McKnight , William J. Murphy

Inventor： Frederic Beaulieu , Gobinda Das , Steven J. Duda , Matthew J. Farinelli , Adreanne Kelly , Samuel McKnight , William J. Murphy

IPC: H01L21/44

CPC classification number: H01L21/76886 , H01L23/3192 , H01L24/03 , H01L24/05 , H01L2224/035 , H01L2224/0362 , H01L2224/03848 , H01L2224/0391 , H01L2224/0401 , H01L2224/04042 , H01L2224/05624 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/13099 , H01L2924/01006 , H01L2924/01007 , H01L2924/01013 , H01L2924/01014 , H01L2924/01018 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/01064 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/14 , H01L2924/1433 , H01L2924/00014

Abstract: Techniques for bond pad fabrication are provided. In one aspect, a method of forming a bond pad comprises the following steps. At least one alloying element is selectively introduced to at least a portion of at least one surface of the bond pad. The at least one alloying element is diffused into at least a portion of the bond pad through one or more thermal cycles. The at least one alloying element may be selectively introduced to the bond pad by depositing an alloying element layer comprising the at least one alloying element onto the bond pad and patterning and etching at least a portion of the layer.

Abstract translation: 提供了焊盘制造技术。一方面，形成接合焊盘的方法包括以下步骤。至少一种合金元素被选择性地引入到焊盘的至少一个表面的至少一部分上。所述至少一个合金元素通过一个或多个热循环扩散到所述接合焊盘的至少一部分中。可以通过将包含至少一种合金元素的合金元素层沉积到接合焊盘上并且对该层的至少一部分进行图案化和蚀刻来将至少一种合金元素选择性地引入到焊盘。

5.

发明申请
Techniques for Improving Bond Pad Performance 有权
Title translation: 提高键盘性能的技术

公开(公告)号：US20120279767A1

公开(公告)日：2012-11-08

申请号：US13550105

申请日：2012-07-16

Applicant: Frederic Beaulieu , Gobinda Das , Steven J. Duda , Matthew J. Farinelli , Adreanne Kelly , Samuel McKnight , William J. Murphy

Inventor： Frederic Beaulieu , Gobinda Das , Steven J. Duda , Matthew J. Farinelli , Adreanne Kelly , Samuel McKnight , William J. Murphy

IPC: H05K1/00 , H05K3/00 , H05K1/09

CPC classification number: H01L21/76886 , H01L23/3192 , H01L24/03 , H01L24/05 , H01L2224/035 , H01L2224/0362 , H01L2224/03848 , H01L2224/0391 , H01L2224/0401 , H01L2224/04042 , H01L2224/05624 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/13099 , H01L2924/01006 , H01L2924/01007 , H01L2924/01013 , H01L2924/01014 , H01L2924/01018 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/01064 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/14 , H01L2924/1433 , H01L2924/00014

Abstract: Techniques for bond pad fabrication are provided. In one aspect, a method of forming a bond pad comprises the following steps. At least one alloying element is selectively introduced to at least a portion of at least one surface of the bond pad. The at least one alloying element is diffused into at least a portion of the bond pad through one or more thermal cycles. The at least one alloying element may be selectively introduced to the bond pad by depositing an alloying element layer comprising the at least one alloying element onto the bond pad and patterning and etching at least a portion of the layer.

Abstract translation: 提供了焊盘制造技术。一方面，形成接合焊盘的方法包括以下步骤。至少一种合金元素被选择性地引入到焊盘的至少一个表面的至少一部分上。所述至少一个合金元素通过一个或多个热循环扩散到所述接合焊盘的至少一部分中。可以通过将包含至少一种合金元素的合金元素层沉积到接合焊盘上并且对该层的至少一部分进行图案化和蚀刻来将至少一种合金元素选择性地引入到焊盘。

6.

发明申请
MICROWAVE READOUT FOR FLUX-BIASED QUBITS 有权
Title translation: 微处理器为微处理器提供微波读取

公开(公告)号：US20110175062A1

公开(公告)日：2011-07-21

申请号：US13026339

申请日：2011-02-14

Applicant: Matthew J. Farinelli , George A. Keefe , Shwetank Kumar , Matthias Steffen

Inventor： Matthew J. Farinelli , George A. Keefe , Shwetank Kumar , Matthias Steffen

IPC: H01L39/22

CPC classification number: G06N99/002 , B82Y10/00

Abstract: A method for determining whether a quantum system comprising a superconducting qubit is occupying a first basis state or a second basis state once a measurement is performed is provided. The method, comprising: applying a signal having a frequency through a transmission line coupled to the superconducting qubit characterized by two distinct, separate, and stable states of differing resonance frequencies each corresponding to the occupation of the first or second basis state prior to measurement; and measuring at least one of an output power or phase at an output port of the transmission line, wherein the measured output power or phase is indicative of whether the superconducting qubit is occupying the first basis state or the second basis state.

Abstract translation: 提供了一旦确定包括超导量子位的量子系统是否在执行测量时占据第一基础状态或第二基础状态的方法。该方法包括：通过耦合到超导量子位的传输线施加具有频率的信号，其特征在于两个不同的，独立的和稳定的不同共振频率的状态，每个共振频率对应于在测量之前占用第一或第二基准状态; 并且测量所述传输线的输出端口处的输出功率或相位中的至少一个，其中所述测量的输出功率或相位指示所述超导量子位是否占据所述第一基准状态或所述第二基准状态。

7.

发明授权
Interposer structures and methods of manufacturing the same 失效
Title translation: 插件结构及其制造方法

公开(公告)号：US07688095B2

公开(公告)日：2010-03-30

申请号：US11741345

申请日：2007-04-27

Applicant: Steven A. Cordes , Matthew J. Farinelli , Sherif A. Goma

Inventor： Steven A. Cordes , Matthew J. Farinelli , Sherif A. Goma

IPC: G01R31/02

CPC classification number: G01R1/0735 , G01R3/00 , H05K3/06 , H05K3/4007 , H05K3/4038

Abstract: Flexible and rigid interposers for use in the semiconductor industry and methods for manufacturing the same are described. Auto-catalytic processes are used to minimize the costs associated with the production of flexible interposers, while increasing the yield and lifetime. Electrical contact regions are easily isolated and the risk of corrosion is reduced because all portions of the interposer are plated at once. Leads projecting from the flexible portion of the interposers accommodate a greater variety of components to be tested. Rigid interposers include a pin projecting from a probe pad affixed to a substrate. The rigidity of the pin penetrates oxides on a contact pad to be tested. Readily available semiconductor materials and processes are used to manufacture the flexible and rigid interposers according to the invention. The flexible and rigid interposers can accommodate pitches down to 25 μm.

Abstract translation: 描述了用于半导体工业的柔性和刚性插入件及其制造方法。自动催化过程用于最小化与柔性插入物的生产相关的成本，同时提高产量和寿命。电接触区域容易隔离，并且由于插入器的所有部分一次镀覆，因此腐蚀的风险降低。从插入件的柔性部分突出的引线可容纳更多种待测试的部件。刚性插入件包括从固定到基板的探针垫突出的销。针的刚度穿过待测接触垫上的氧化物。易于使用的半导体材料和工艺用于制造根据本发明的柔性和刚性插入件。柔性和刚性插入件可以容纳低至25μm的间距。

8.

发明申请
METHOD OF PRODUCING UV STABLE LIQUID CRYSTAL ALIGNMENT 有权
Title translation: 生产紫外线稳定液晶对准的方法

公开(公告)号：US20080266502A1

公开(公告)日：2008-10-30

申请号：US11742474

申请日：2007-04-30

Applicant: George Liang-Tai Chiu , Steven Alan Cordes , James Prtrick Doyle , Matthew J. Farinelli , Minhua Lu , Hiroki Nakano , Ronald Nunes , James Vichiconti

Inventor： George Liang-Tai Chiu , Steven Alan Cordes , James Prtrick Doyle , Matthew J. Farinelli , Minhua Lu , Hiroki Nakano , Ronald Nunes , James Vichiconti

IPC: G02F1/1337 , B05D5/06 , G03F7/00 , C30B33/00

CPC classification number: C30B25/18 , G02F1/13378

Abstract: In a liquid crystal display device, a method for creating desirable pretilt angle by means of topography of the substrates, such as a surface that is sloped with respect to the surface of the electrodes. In combination with a low pretilt but highly photo-stable alignment layer, which may be very resistant to high levels of ultraviolet radiation, a high pretilt and photo-stable alignment structure is generated, by essentially combining two incompatible technical approaches. The ever more stringent requirements for projection displays are met. The methods for producing such sloped surfaces and the considerations related to design of the sloped surfaces are disclosed.

Abstract translation: 在液晶显示装置中，通过诸如相对于电极表面倾斜的表面的基板的形貌来产生理想的预倾斜角的方法。结合一个低预倾斜但高度光稳定的取向层，其可以非常耐高水平的紫外线辐射，通过基本上组合两种不相容的技术方法，产生高预倾斜和光稳定对准结构。对投影显示器的要求越来越严格。公开了用于制造这种倾斜表面的方法以及与倾斜表面的设计有关的考虑。