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    Micro-structures and methods for their manufacture
    1.
    发明授权
    Micro-structures and methods for their manufacture 有权
    微结构及其制造方法

    公开(公告)号：US06713827B2

    公开(公告)日：2004-03-30

    申请号：US10351919

    申请日：2003-01-27

    Applicant: Guy Moshe Cohen ,  Steven Alan Cordes ,  Joanna Rosner ,  Jeannine Madelyn Trewhella

    Inventor： Guy Moshe Cohen ,  Steven Alan Cordes ,  Joanna Rosner ,  Jeannine Madelyn Trewhella

    IPC: H01L2714

    CPC classification number: H01L21/0334 ,  B81C1/00396 ,  B81C1/00428 ,  B81C1/00626 ,  B81C2201/0132 ,  H01L21/0337

    Abstract: A method is provided for the manufacture of micro-structures, such as micro-electromechanical structures (MEMS) or silicon optical benches (SiOB). The method includes using a single mask to pattern two or more cavity areas to be etched into a substrate in different etching steps, and then selectively choosing the cavity areas for etching. In a preferred embodiment, the method includes patterning a substrate to identify a plurality of cavity areas to be etched into the substrate and filling at least one of the cavity areas with a distinctive filler material. Filler material is chemically distinctive in the sense that it can be etched selectively with respect to the other filling materials. At least one of the cavity areas containing a distinctive filler material is then chosen based at least in part on the distinctive filler material. The chosen cavity area is then etched. The methods of the invention produce micro-structures with more accurate cavity areas by minimizing overlay error and avoiding the need for lithography over extreme topography. The micro-structures manufactured by the methods of the invention are also provided herein.

    Abstract translation: 提供了用于制造诸如微机电结构（MEMS）或硅光学台（SiOB）的微结构的方法。 该方法包括使用单个掩模在不同的蚀刻步骤中将要蚀刻的两个或更多个腔体区域图案化成衬底，然后选择性地选择用于蚀刻的空腔区域。 在优选实施例中，该方法包括图案化衬底以识别要蚀刻到衬底中的多个空腔区域，并用独特的填充材料填充至少一个空腔区域。 填充材料在化学上是有意义的，因为它可以相对于其他填充材料选择性地被蚀刻。 至少部分地基于不同的填充材料来选择含有特殊填料的至少一个空腔区域。 然后蚀刻所选择的腔体区域。 本发明的方法通过最小化重叠误差并避免在极端地形上对光刻的需要而产生具有更精确的空腔区域的微结构。 本文还提供了通过本发明的方法制造的微结构。

    Micro-structures and methods for their manufacture
    4.
    发明授权
    Micro-structures and methods for their manufacture 有权

    公开(公告)号：US06562642B1

    公开(公告)日：2003-05-13

    申请号：US10072330

    申请日：2002-02-07

    Applicant: Guy Moshe Cohen ,  Steven Alan Cordes ,  Joanna Rosner ,  Jeannine Madelyn Trewhella

    Inventor： Guy Moshe Cohen ,  Steven Alan Cordes ,  Joanna Rosner ,  Jeannine Madelyn Trewhella

    IPC: H01L2100

    CPC classification number: H01L21/0334 ,  B81C1/00396 ,  B81C1/00428 ,  B81C1/00626 ,  B81C2201/0132 ,  H01L21/0337

    Abstract: A method is provided for the manufacture of micro-structures, such as micro-electromechanical structures (MEMS) or silicon optical benches (SiOB). The method includes using a single mask to pattern two or more cavity areas to be etched into a substrate in different etching steps, and then selectively choosing the cavity areas for etching. In a preferred embodiment, the method includes patterning a substrate to identify a plurality of cavity areas to be etched into the substrate and filling at least one of the cavity areas with a distinctive filler material. Filler material is chemically distinctive in the sense that it can be etched selectively with respect to the other filling materials. At least one of the cavity areas containing a distinctive filler material is then chosen based at least in part on the distinctive filler material. The chosen cavity area is then etched. The methods of the invention produce micro-structures with more accurate cavity areas by minimizing overlay error and avoiding the need for lithography over extreme topography. The micro-structures manufactured by the methods of the invention are also provided herein.

    Method and apparatus for thermal management of integrated circuits
    7.
    发明授权
    Method and apparatus for thermal management of integrated circuits 失效
    集成电路热管理方法和装置

    公开(公告)号：US06893902B2

    公开(公告)日：2005-05-17

    申请号：US10122613

    申请日：2002-04-11

    Applicant: Michael James Cordes ,  Steven Alan Cordes ,  Uttam Shyamalindu Ghoshal ,  Errol Wayne Robinson ,  James Louis Speidell

    Inventor： Michael James Cordes ,  Steven Alan Cordes ,  Uttam Shyamalindu Ghoshal ,  Errol Wayne Robinson ,  James Louis Speidell

    IPC: H01L23/38 ,  H01L35/28 ,  H01L35/32 ,  H01L35/34 ,  H01L21/44 ,  H01L23/34 ,  H01L35/04

    CPC classification number: H01L23/38 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: Method and apparatus for thermal management of an integrated circuit. A semiconductor device includes an integrated circuit and an integrated thermoelectric cooler formed on a common substrate. A semiconductor device is fabricated by forming an integrated circuit on a front side of the substrate and forming an integrated thermoelectric cooler on a back side of the substrate. A first thermal sink of semiconductor material capable of absorbing heat from the integrated circuit is formed on the back side of the substrate. N-type thermoelectric elements are formed on contacts formed on the first thermal sink. P-type thermoelectric elements are formed on contacts formed on a second thermal sink of semiconductor material capable of dissipating heat. The p-type and n-type thermoelectric elements are bonded to the contacts on the first and second thermal sinks, respectively, by a flip-chip soldering process. Using this method, semiconductor devices including an integrated circuit and integrated modules of thermoelectric elements are formed having cooling capacities corresponding to heat dissipated from different portions of the integrated circuit. As a result, substantially uniform temperature distribution across the integrated circuit can be achieved.

    Abstract translation: 集成电路的热管理方法和装置。 半导体器件包括形成在公共衬底上的集成电路和集成热电冷却器。 通过在基板的前侧形成集成电路并在基板的背面形成集成的热电冷却器来制造半导体器件。 在基板的背面形成能够从集成电路吸收热量的半导体材料的第一散热器。 N型热电元件形成在形成在第一散热器上的触点上。 P型热电元件形成在能够散热的半导体材料的第二散热器上形成的触点上。 分别通过倒装焊接工艺将p型和n型热电元件分别结合到第一和第二散热器上的触点。 使用该方法，形成包括集成电路的半导体器件和热电元件的集成模块，其具有对应于从集成电路的不同部分散热的散热能力。 结果，可以实现整个集成电路的基本均匀的温度分布。

    X-ray mask pellicles and their attachment in semiconductor manufacturing
    9.
    发明授权
    X-ray mask pellicles and their attachment in semiconductor manufacturing 失效
    X射线掩模防护薄膜及其在半导体制造中的应用

    公开(公告)号：US06192100B1

    公开(公告)日：2001-02-20

    申请号：US09335980

    申请日：1999-06-18

    Applicant: Raul Edmundo Acosta ,  Michael James Cordes ,  Steven Alan Cordes

    Inventor： Raul Edmundo Acosta ,  Michael James Cordes ,  Steven Alan Cordes

    IPC: G21K500

    CPC classification number: G03F1/22 ,  G03F1/62 ,  G03F1/64 ,  G03F7/707 ,  G03F7/70983

    Abstract: In the invention a pellicle mounting structural principle is provided whereby a membrane for protection of an X-ray mask is interchangeably positioned with proper spacing between the X-ray mask and the resist on the wafer in which the pattern produced by the X-ray exposure is to be formed. The mounting principle employs a combined assembly of, a membrane and spacer member subassembly together with a means for seectably separable retention to the supporting structural portion of the mask The principle accommodates membrane materials that may not be flexible and provides an ability to remove the membrane for cleaning or replacement and to removal and reassembly with ease in reestablishing the spacing with respect to the mask. The means for the selectably separable retention to the supporting structural portion of the mask involves the use of springs and elastomers, securing to the sides of the supporting structural mask ring and the bonding of the spacer member directly to the mask.

    Abstract translation: 在本发明中，提供了一种防护薄膜安装结构原理，其中用于保护X射线掩模的膜可互换地定位，其中X射线掩模和晶片上的抗蚀剂之间具有适当的间距，其中X射线曝光产生的图案 将要形成。 安装原理采用膜和间隔件子组件的组合组合以及用于可屏蔽地分离地保持到掩模的支撑结构部分的装置。该原理适应可能不柔性的膜材料并且提供去除膜的能力 清洁或更换，并轻松拆卸和重新组装，以重新建立相对于面罩的间距。 用于可选地可分离地保留到掩模的支撑结构部分的装置涉及使用弹簧和弹性体，固定到支撑结构掩模环的侧面并且将间隔构件直接结合到掩模。

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