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公开(公告)号：US20040260860A1
公开(公告)日：2004-12-23
申请号：US10890270
申请日：2004-07-14
发明人： Masaya Sumita
IPC分类号： G06F012/00
CPC分类号： G06F12/0893 , G06F12/0864 , G06F12/1027 , G06F12/1054 , G11C2207/2245
摘要： It is an object of the present invention to provide a semiconductor integrated circuit having a chip layout that reduces line length to achieve faster processing. A cache comprises a TAG memory module and a cache data memory module. The cache data memory module is divided into first and second cache data memory modules which are disposed on both sides of the TAG memory module, and input/output circuits of a data TLB are opposed to the input/output circuit of the TAG memory module and the input/output circuits of the first and second cache data memory modules across a bus area to reduce the line length to achieve faster processing.
摘要翻译： 本发明的目的是提供一种具有减少线路长度以实现更快处理的芯片布局的半导体集成电路。 缓存包括TAG存储器模块和高速缓存数据存储器模块。 高速缓存数据存储器模块被分为设置在TAG存储器模块两侧的第一和第二高速缓存数据存储器模块，数据TLB的输入/输出电路与TAG存储器模块的输入/输出电路相对， 跨总线区域的第一和第二高速缓存数据存储器模块的输入/输出电路，以减少线路长度以实现更快的处理。
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公开(公告)号：US20040253825A1
公开(公告)日：2004-12-16
申请号：US10861487
申请日：2004-06-07
发明人： Takeshi Kawabata
IPC分类号： H01L023/04 , H01L021/44 , H01L021/311 , H01L021/302
CPC分类号： H01L23/49838 , H01L21/4846 , H01L23/49822 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L2224/05554 , H01L2224/32225 , H01L2224/451 , H01L2224/48091 , H01L2224/48227 , H01L2224/49171 , H01L2224/73265 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01028 , H01L2924/01029 , H01L2924/01078 , H01L2924/01079 , H01L2924/014 , H01L2924/10162 , H01L2924/15311 , H01L2924/181 , H01L2924/30105 , H01L2924/30107 , H01L2924/3011 , H01L2924/30111 , H01L2924/3025 , H05K1/0216 , H05K3/0052 , H05K3/242 , H05K3/4652 , H05K2201/0919 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/05599
摘要： A semiconductor device comprises a base, a semiconductor element having a plurality of electrodes, a plurality of conductive lines connected to the electrodes of the semiconductor element, plating stubs attached to the conductive lines, and a plurality of wiring layers formed in a plurality of layers on the base. The plating stub attached to a first conductive line, and the plating stubs attached to one or a plurality of second conductive lines adjacent to the first conductive line, exist in different conductive wiring layers.
摘要翻译： 一种半导体器件，包括基底，具有多个电极的半导体元件，连接到半导体元件的电极的多个导线，附着到导电线的电镀短截线，以及多层形成的多个布线层 在基地 附接到第一导电线的电镀短截线和附接到与第一导线相邻的一个或多个第二导线的电镀短截线存在于不同的导电布线层中。
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公开(公告)号：US20040246763A1
公开(公告)日：2004-12-09
申请号：US10862327
申请日：2004-06-08
发明人： Yasuo Murakuki
IPC分类号： G11C011/22
CPC分类号： G11C11/22
摘要： The present invention has a configuration with which the data null0null and the data null1null can be arbitrarily written to a reference cell capacitor for generating a reference potential, and comprises a non-volatile capacitor for storing the data to be written. This configuration makes the fine adjustment of the reference potential possible without a mask correction, which improves yield. The present invention also comprises a means of rewriting only the reference capacitors. By this configuration, the dispersion of the reference potential can be controlled, and yield is improved.
摘要翻译： 本发明具有可以将数据“0”和数据“1”任意写入用于产生参考电位的参考单元电容器的配置，并且包括用于存储要写入的数据的非易失性电容器。 该配置使得可以在不进行掩模校正的情况下对参考电位进行微调，这提高了产量。 本发明还包括仅重写参考电容器的装置。 通过该结构，可以控制基准电位的分散，提高产率。
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公开(公告)号：US20040227424A1
公开(公告)日：2004-11-18
申请号：US10846707
申请日：2004-05-17
发明人： Tetsuo Shimasaki , Shigeaki Fujiki , Makoto Ueno
IPC分类号： H02K009/00 , H02K005/00 , H02K001/00
摘要： A compact and light electric blower which is improved in wiring cooling capability without reducing the airflow efficiency. The electric blower includes a spool attached to end surfaces of a field core fixed to a motor frame of which outer periphery portion is in an approximately cylindrical shape, and field wiring each wound across the field core and the spool, wherein a gap capable of passing air is formed between the coil end between slots of the field wiring and the field core, and each spool is provided with a wall surface which narrows the airflow section formed between the field core and the motor frame while forming a periphery portion of the field wiring.
摘要翻译： 一种紧凑型轻型电动鼓风机，其在不降低气流效率的情况下提高了布线冷却能力。 电动鼓风机包括安装在固定到电动机框架的外围部分为大致圆筒形状的磁芯的端面的线轴，以及各自缠绕在磁芯和线轴上的励磁线，其中能够通过的间隙 在现场布线的槽之间的线圈端和场磁芯之间形成空气，并且每个线轴设置有壁面，该壁面在形成场磁芯和电动机框架之间形成的气流部分同时形成现场布线的周边部分 。
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公开(公告)号：US20040217799A1
公开(公告)日：2004-11-04
申请号：US10836202
申请日：2004-05-03
发明人： Takashi Ichihara
IPC分类号： H03L007/00
CPC分类号： G09G3/3674 , G09G2310/0289 , G09G2330/02
摘要： A semiconductor circuit device, in which an output device is driven by inputting a direct current voltage source having a predetermined potential difference on the high potential side relative to a system ground and a power supply having a potential varied with time relative to the system ground. The semiconductor circuit device includes a voltage conversion circuit which converts an input signal having an amplitude between the system ground and the direct current voltage source into a converted signal having an amplitude between an internal ground and an internal power supply, and outputs the converted signal. The internal ground is controlled to have a potential varied with time relative to the system ground, and the internal power supply is controlled to change according to a change of the internal ground and have the predetermined potential difference on the high potential side when the internal ground has a fixed potential. A selector circuit selects and outputs the input signal and the converted signal according to the potential of the internal ground.
摘要翻译： 一种半导体电路装置，其中输出装置通过在相对于系统地的高电位侧输入具有预定电位差的直流电压源和具有随时间相对于系统接地而变化的电力来驱动。 半导体电路装置包括电压转换电路，其将具有系统地与直流电压源之间的振幅的输入信号转换成具有内部地与内部电源之间的振幅的转换信号，并输出转换后的信号。 内部接地被控制为具有相对于系统接地的时间变化的电位，并且内部电源被控制以根据内部接地的变化而变化，并且当内部接地处于高电位侧时具有预定的电位差 具有固定的潜力。 选择器电路根据内部地的电位来选择输出输入信号和转换信号。
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公开(公告)号：US20040187040A1
公开(公告)日：2004-09-23
申请号：US10764511
申请日：2004-01-27
发明人： Yukihiro Sasagawa
IPC分类号： G06F001/26
CPC分类号： G06F9/30083 , G06F1/3203 , G06F1/3243 , G06F1/329 , G06F9/30072 , G06F9/30145 , G06F9/30189 , Y02D10/152 , Y02D10/24 , Y02D50/20
摘要： An objective is to perform a low power operation of a microprocessor on the pipeline stage of an instruction decode and a preceding pipeline stage without the necessity for increasing a circuit size or decoding time. An instruction code of each program for performing an instruction includes a first instruction set, which includes a flag for specifying predicate (301), and one or more second instruction sets including control specification information (302). A low power operation of each control circuit is performed for each instruction according to the instruction execution control function. Thus, without the necessity for increasing a circuit size or decoding time, it is possible to control the pipeline stage of an instruction decode and a preceding pipeline stage, achieving a low power operation of the microprocessor.
摘要翻译： 目的是在指令解码和前一流水线级的流水线级上执行微处理器的低功率操作，而不需要增加电路尺寸或解码时间。 用于执行指令的每个程序的指令代码包括包括用于指定谓词（301）的标志的第一指令集和包括控制指定信息（302）的一个或多个第二指令集。 根据指令执行控制功能，对每个指令执行每个控制电路的低功率操作。 因此，不需要增加电路尺寸或解码时间，可以控制指令译码和前一流水线级的流水线级，实现微处理器的低功率操作。
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公开(公告)号：US20030196038A1
公开(公告)日：2003-10-16
申请号：US10446802
申请日：2003-05-29
发明人： Masaya Sumita
IPC分类号： G06F012/00
CPC分类号： G06F12/0893 , G06F12/0864 , G06F12/1027 , G06F12/1054 , G11C2207/2245
摘要： It is an object of the present invention to provide a semiconductor integrated circuit having a chip layout that reduces line length to achieve faster processing. A cache comprises a TAG memory module and a cache data memory module. The cache data memory module is divided into first and second cache data memory modules which are disposed on both sides of the TAG memory module, and input/output circuits of a data TLB are opposed to the input/output circuit of the TAG memory module and the input/output circuits of the first and second cache data memory modules across a bus area to reduce the line length to achieve faster processing.
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公开(公告)号：US20030161225A1
公开(公告)日：2003-08-28
申请号：US10372936
申请日：2003-02-26
发明人： Yukio Morioka , Jun Kitamura , Masahiko Nakamura
IPC分类号： G11B007/085 , G11B021/08
CPC分类号： G11B17/056 , G11B17/223
摘要： With a conventional disk changer, it takes a long time with poor operability to directly and visually confirm which tray has a disk or which tray has which disk in a device. A disk changer of the invention includes a tray transfer unit for shuttling trays between a standby position and an attaching/detaching position and between the standby position and a recording/reproducing position, a tray gear unit engaged separately with the trays, and a tray driving unit for driving the trays separately via the tray gear unit, so that the trays can be separately moved from the standby position to the attaching/detaching position via the tray gear unit and the trays can be protruded to the attaching/detaching position while being arranged like steps. Hence, it is possible to directly and visually confirm which tray has a disk or which tray has which disk in a device with a simple operation in a short time.
摘要翻译： 使用传统的换盘器，需要很长时间才能直接和可视地确认哪个盘具有盘或哪个盘具有设备中的哪个盘。 本发明的盘片更换器包括托盘传送单元，用于在待机位置和安装/拆卸位置之间以及备用位置和记录/再现位置之间穿梭托盘，与托盘分开接合的托盘减速器单元和托盘驱动 单元，用于经由盘式齿轮单元分别驱动托架，使得托盘可以经由托盘减速器单独地从待机位置移动到安装/拆卸位置，并且托盘可以突出到附接/分离位置同时布置 像步骤 因此，可以直接和可视地确认在短时间内具有简单操作的哪个托盘具有盘或哪个托盘在设备中具有哪个盘。
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公开(公告)号：US20030155845A1
公开(公告)日：2003-08-21
申请号：US10287797
申请日：2002-11-05
发明人： Hirokazu Uchiyama , Yuko Ogawa , Hiroyuki Kita
IPC分类号： H01L041/08
CPC分类号： H01L41/332 , H01L41/314 , Y10S29/001 , Y10S29/016 , Y10T29/42 , Y10T29/49128 , Y10T29/49155 , Y10T29/4981
摘要： A method of manufacturing a thin film piezoelectric element, wherein main electrode layer, piezoelectric thin film, and opposed electrode layer respectively having specified shapes are first formed on first substrate and second substrate, and after that, the opposed electrodes are opposed and bonded to each other, and insulating resin layer is formed over the peripheral portion thereof, and then the second substrate is removed, the insulating resin layer is etched, and connecting electrode pad is formed, and finally, the first substrate is removed to obtain a completely separated thin film piezoelectric element. By this method, it is possible to improve the reproducibility of shapes and to prevent trouble such as shorting between the electrodes which hold the piezoelectric thin film, thereby making it possible to provide a thin film piezoelectric element that may assure high yield without variation in piezoelectric characteristics, and its manufacturing method.
摘要翻译： 首先，在第一基板和第二基板上首先形成分别具有特定形状的主电极层，压电薄膜和相对电极层的薄膜压电元件的制造方法，然后将相对的电极相对并贴合 其它绝缘树脂层形成在其周边部分上，然后除去第二基板，蚀刻绝缘树脂层，形成连接电极焊盘，最后移除第一基板以获得完全分离的薄片 薄膜压电元件。 通过这种方法，可以提高形状的再现性，并且可以防止保持压电薄膜的电极之间的短路等故障，从而可以提供可以保证高产率而不会在压电变化的情况下提供的薄膜压电元件 特点及其制造方法。
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公开(公告)号：US20030138993A1
公开(公告)日：2003-07-24
申请号：US10328189
申请日：2002-12-26
IPC分类号： H01L021/44 , H01L021/48 , H01L021/50
CPC分类号： H01L21/563 , H01L24/29 , H01L24/75 , H01L24/83 , H01L24/90 , H01L25/0657 , H01L25/50 , H01L2224/05568 , H01L2224/05573 , H01L2224/1134 , H01L2224/13099 , H01L2224/16225 , H01L2224/2919 , H01L2224/32225 , H01L2224/73203 , H01L2224/73204 , H01L2224/75 , H01L2224/75743 , H01L2224/83192 , H01L2224/83859 , H01L2224/83874 , H01L2224/83951 , H01L2225/06517 , H01L2924/00013 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01033 , H01L2924/0665 , H01L2924/07802 , H01L2924/14 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
摘要： A method for manufacturing a semiconductor device whereby semiconductor elements like semiconductor bare chips are mounted with high productivity on both surfaces of a circuit board while preventing the board from warping, and an apparatus for manufacturing a semiconductor device for faithfully embodying the manufacturing method. Semiconductor elements temporarily fixed on both surfaces of a circuit board are heated while being pressurized in directions to be each pressed against the board, whereby adhesive on both surfaces of the board is thermally set simultaneously and bumps on each semiconductor elements are press-bonded to their opposing board electrodes on the board to be electrically connected. Ultraviolet rays are irradiated to a circumference of mixed curing adhesive applied to at least one surface of the circuit board to form an ultraviolet curing part only on the circumference of the adhesive, thereby increasing strength for temporarily fixing the semiconductor elements to the circuit board.
摘要翻译： 一种制造半导体器件的方法，其中半导体元件如半导体裸芯片以高生产率安装在电路板的两个表面上同时防止板翘曲，以及用于制造半导体器件的装置，用于忠实地体现该制造方法。 临时固定在电路板的两个表面上的半导体元件在被压靠在板上的方向被加压的同时被加热，由此在板的两个表面上的粘合剂被同时热定形，并且将每个半导体元件上的凸块压接在它们 板上的相对的电路板电极要电连接。 紫外线照射到施加到电路板的至少一个表面的混合固化粘合剂的周边，以在粘合剂的周围仅形成紫外线固化部分，从而增加将半导体元件临时固定到电路板的强度。
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