公开(公告)号：US20050001293A1

公开(公告)日：2005-01-06

申请号：US10888769

申请日：2004-07-08

Applicant: Maria Cristina Estacio

Inventor： Maria Cristina Estacio

IPC: H01L23/495 ,  H01L23/48

CPC classification number: H01L23/49575 ,  H01L23/49562 ,  H01L24/37 ,  H01L24/40 ,  H01L2224/37147 ,  H01L2224/40245 ,  H01L2224/83801 ,  H01L2224/84801 ,  H01L2224/8485 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/00014

Abstract: A semiconductor device including a leadframe and two stacked dies, a first of which is on a top surface of a leadframe while the second one is on a bottom surface of the leadframe. The drain region of the first die is coupled to a drain clip assembly that includes a drain clip that is in contact with a lead rail. The body of the semiconductor device includes a window or opening that exposes the drain region of the second die.

Abstract translation: 一种半导体器件，包括引线框架和两个堆叠的管芯，其中第一个位于引线框架的顶表面上，而第二个位于引线框架的底表面上。 第一管芯的漏极区域连接到排水夹组件，其包括与导轨接触的排水夹。 半导体器件的主体包括暴露第二管芯的漏极区域的窗口或开口。

公开(公告)号：US20090224383A1

公开(公告)日：2009-09-10

申请号：US12044314

申请日：2008-03-07

Applicant: Erwin Victor Cruz ,  Maria Cristina Estacio

Inventor： Erwin Victor Cruz ,  Maria Cristina Estacio

IPC: H01L23/495 ,  H01L21/60

CPC classification number: H01L23/49562 ,  H01L23/49524 ,  H01L24/37 ,  H01L24/40 ,  H01L2224/32245 ,  H01L2224/37011 ,  H01L2224/37147 ,  H01L2224/4007 ,  H01L2224/40095 ,  H01L2224/40245 ,  H01L2224/40247 ,  H01L2224/40249 ,  H01L2224/8385 ,  H01L2224/84801 ,  H01L2224/8485 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/00014

Abstract: A clip structure and semiconductor die package. The clip structure includes a first portion and a second portion, with a connecting structure located between the first and second portion. The clip structure is substantially planar. The semiconductor die package includes a semiconductor die located between a leadframe structure and a clip structure. Slots are formed within the molding material covering portions of the semiconductor die package. The slots are located between a first portion and the second portion of the clip structure, and the slot overlap with the semiconductor die.

Abstract translation: 夹子结构和半导体管芯封装。 夹子结构包括第一部分和第二部分，其中连接结构位于第一部分和第二部分之间。 夹子结构基本上是平面的。 半导体管芯封装包括位于引线框架结构和夹子结构之间的半导体管芯。 在覆盖半导体管芯封装的部分的成型材料内形成槽。 槽位于夹结构的第一部分和第二部分之间，并且槽与半导体管芯重叠。

公开(公告)号：US20070132073A1

公开(公告)日：2007-06-14

申请号：US11608626

申请日：2006-12-08

Applicant: Toong Tiong ,  Maria Cristina Estacio ,  David Lim

Inventor： Toong Tiong ,  Maria Cristina Estacio ,  David Lim

IPC: H01L21/00 ,  H01L23/495

CPC classification number: H01L23/49537 ,  H01L21/561 ,  H01L21/568 ,  H01L23/4334 ,  H01L23/4952 ,  H01L24/97 ,  H01L2224/16 ,  H01L2224/16245 ,  H01L2224/73153 ,  H01L2224/73253 ,  H01L2224/97 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01055 ,  H01L2924/01082 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/16152 ,  H01L2924/181 ,  H01L2224/84 ,  H01L2224/81 ,  H01L2924/00

Abstract: A packaged semiconductor device includes a two piece lead assembly having vertically separated top and bottom lead frames. A semiconductor die is between the two lead frames and makes electrical and thermal contact to the two lead frames. The lower lead frame is generally flat while the upper lead frame has a flat top surface and downward extensions that fall on two opposite sides of the lower lead frame and that end in flanges that have bottom surfaces that are coplanar with the bottom surface of the bottom lead frame. When the assembly is molded, the top surface of the top lead frame and the bottom surfaces of the flanges and the bottom lead frame are exposed to allow electrical contact to the semiconductor die and to provide thermal conductive paths to dissipate heat developed in the semiconductor die.

Abstract translation: 封装的半导体器件包括具有垂直分离的顶部和底部引线框架的双片引线组件。 半导体管芯位于两个引线框架之间，并与两个引线框架电气和热接触。 下引线框架通常是平坦的，而上引线框架具有平坦的顶表面和落在下引线框架的两个相对侧上的向下延伸部分，并且端部在具有与底部底表面共面的底表面的凸缘中 引线框架 当组件被模制时，顶部引线框架的顶表面和凸缘的底表面和底部引线框架被暴露以允许与半导体管芯的电接触并提供热传导路径以散发在半导体管芯中显影的热量 。

公开(公告)号：US20070001278A1

公开(公告)日：2007-01-04

申请号：US11471291

申请日：2006-06-19

Applicant: Oseob Jeon ,  Yoonhwa Choi ,  Boon Gooi ,  Maria Cristina Estacio ,  David Chong ,  Tan Keng ,  Shibaek Nam ,  Rajeev Joshi ,  Chung-Lin Wu ,  Venkat Iyer ,  Lay Lim ,  Byoung-Ok Lee

Inventor： Oseob Jeon ,  Yoonhwa Choi ,  Boon Gooi ,  Maria Cristina Estacio ,  David Chong ,  Tan Keng ,  Shibaek Nam ,  Rajeev Joshi ,  Chung-Lin Wu ,  Venkat Iyer ,  Lay Lim ,  Byoung-Ok Lee

IPC: H01L21/00

CPC classification number: H01L24/29 ,  H01L21/561 ,  H01L23/3121 ,  H01L23/4951 ,  H01L23/49558 ,  H01L23/49562 ,  H01L23/49575 ,  H01L23/49861 ,  H01L24/32 ,  H01L24/36 ,  H01L24/40 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/83 ,  H01L24/97 ,  H01L25/0655 ,  H01L2223/54406 ,  H01L2223/54486 ,  H01L2224/16 ,  H01L2224/291 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/29299 ,  H01L2224/293 ,  H01L2224/32057 ,  H01L2224/32225 ,  H01L2224/40245 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45169 ,  H01L2224/45565 ,  H01L2224/456 ,  H01L2224/45644 ,  H01L2224/45669 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48227 ,  H01L2224/48237 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/48465 ,  H01L2224/49113 ,  H01L2224/4943 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/83192 ,  H01L2224/83385 ,  H01L2224/83801 ,  H01L2224/8385 ,  H01L2224/85013 ,  H01L2224/97 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/12042 ,  H01L2924/1305 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15747 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/19043 ,  H01L2924/30107 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2924/0105 ,  H01L2924/01082 ,  H01L2924/00012 ,  H01L2224/13111 ,  H01L2924/0665 ,  H01L2224/29099 ,  H01L2224/29199 ,  H01L2224/37099

Abstract: Semiconductor die packages are disclosed. An exemplary semiconductor die package includes a premolded substrate. The premolded substrate can have a semiconductor die attached to it, and an encapsulating material may be disposed over the semiconductor die.

Abstract translation: 公开了半导体管芯封装。 示例性半导体管芯封装包括预成型衬底。 预成型基板可以具有附接到其上的半导体管芯，并且封装材料可以设置在半导体管芯上方。

公开(公告)号：US20050130350A1

公开(公告)日：2005-06-16

申请号：US11051413

申请日：2005-02-04

Applicant: Maria Cristina Estacio ,  Maria Clemens Quinones

Inventor： Maria Cristina Estacio ,  Maria Clemens Quinones

IPC: H01L21/60 ,  H01L23/495 ,  H01L21/44 ,  H01L21/48 ,  H01L21/50

CPC classification number: H01L23/49562 ,  H01L24/37 ,  H01L24/40 ,  H01L2224/37147 ,  H01L2224/40245 ,  H01L2224/45144 ,  H01L2924/01004 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/13091 ,  H01L2924/00

Abstract: A chip device including a leadframe that includes source and gate connections, a bumped die including solder bumps on a top side that is attached to the leadframe such that the solder bumps contact the source and gate connections, and a copper clip attached to the backside of the bumped die such that the copper clip contacts drain regions of the bumped die and a lead rail. The chip device is manufactured by flip chipping a bumped die onto the leadframe and placing the copper clip on a backside of the trench die such that the backside of the trench die is coupled to the lead rail. The process involves reflowing the solder bumps on the bumped die and solder paste that is placed between the copper clip and the backside of the bumped die.

Abstract translation: 一种包括引线框架的芯片器件，其包括源极和栅极连接，凸起的裸片包括在顶侧上的焊料凸块，所述焊接凸块附接到引线框架，使得焊料凸块接触源极和栅极连接;以及铜夹， 碰撞模具，使得铜夹接触凸起模具的漏区和导轨。 芯片器件通过将凸起的裸片翻转到引线框上并将铜夹放置在沟槽管芯的背面上，使得沟槽管芯的背面与引线相连接来制造。 该过程涉及回流在凸起的裸片上的焊料凸块和放置在铜夹与凸模的背面之间的焊膏。