公开(公告)号：US20130328220A1

公开(公告)日：2013-12-12

申请号：US13494721

申请日：2012-06-12

Applicant: KyungHoon Lee ,  JoungIn Yang ,  SangMi Park ,  YiSu Park ,  DaeSik Choi

Inventor： KyungHoon Lee ,  JoungIn Yang ,  SangMi Park ,  YiSu Park ,  DaeSik Choi

IPC: H01L23/28 ,  H01L21/56

CPC classification number: H01L23/3121 ,  H01L21/565 ,  H01L21/6836 ,  H01L23/49827 ,  H01L29/0657 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2924/18161 ,  H01L2924/014

Abstract: A method of manufacture of an integrated circuit packaging system includes: providing a substrate; forming an integrated circuit device having a shaped side; mounting the integrated circuit device on the substrate; forming an encapsulation on the substrate and the integrate circuit device with the shaped side partially exposed from the encapsulation.

Abstract translation: 一种集成电路封装系统的制造方法，包括：提供基板; 形成具有成形侧的集成电路器件; 将集成电路器件安装在衬底上; 在衬底和集成电路器件上形成封装，其中成形侧部分地从封装暴露出来。

公开(公告)号：US20130322023A1

公开(公告)日：2013-12-05

申请号：US13489282

申请日：2012-06-05

Applicant: Gwangjin Kim ,  JoungIn Yang ,  DokOk Yu ,  Hoon Jung ,  Jae Han Chung

Inventor： Gwangjin Kim ,  JoungIn Yang ,  DokOk Yu ,  Hoon Jung ,  Jae Han Chung

IPC: H05K7/20 ,  H05K3/10

CPC classification number: H01L23/4334 ,  H01L23/42 ,  H01L23/49816 ,  H01L2224/16225 ,  H01L2224/32245 ,  H01L2224/73253 ,  H01L2224/92225 ,  H01L2924/15311 ,  H01L2924/1815 ,  H01L2924/18161 ,  Y10T29/49155

Abstract: A method of manufacture of an integrated circuit packaging system includes: providing a substrate; attaching an integrated circuit to the substrate; molding an encapsulation directly on the integrated circuit and the substrate; forming a trench in the encapsulation having a trench bottom surface and surrounding the integrated circuit; and mounting a heatsink having a heatsink rim over the integrated circuit with the heatsink rim within the trench and the heatsink electrically isolated from the substrate.

Abstract translation: 一种集成电路封装系统的制造方法，包括：提供基板; 将集成电路附接到所述基板; 直接在集成电路和基板上成型封装; 在所述封装中形成具有沟槽底表面并围绕所述集成电路的沟槽; 以及将具有散热器边缘的散热器安装在所述集成电路内，并且所述散热器边缘在所述沟槽内，并且所述散热器与所述衬底电隔离。

公开(公告)号：US20130299995A1

公开(公告)日：2013-11-14

申请号：US13466945

申请日：2012-05-08

Applicant: KyungHoon Lee ,  JoungIn Yang ,  Sang Mi Park ,  DaeSik Choi ,  YiSu Park

Inventor： KyungHoon Lee ,  JoungIn Yang ,  Sang Mi Park ,  DaeSik Choi ,  YiSu Park

IPC: H01L23/48 ,  H01L21/50

CPC classification number: H01L21/563 ,  H01L24/16 ,  H01L24/29 ,  H01L24/83 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/16225 ,  H01L2224/16238 ,  H01L2224/26175 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/81191 ,  H01L2224/81203 ,  H01L2224/81815 ,  H01L2224/83104 ,  H01L2224/83385 ,  H01L2224/92125 ,  H01L2924/01322 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00015 ,  H01L2924/00014 ,  H01L2924/0665 ,  H01L2924/014 ,  H01L2924/00

Abstract: A semiconductor device has a substrate and insulating layer formed over a surface of the substrate. A first conductive layer is formed over the surface of the substrate. A second conductive layer is formed over an opposing surface of the substrate. A conductive via is formed through the substrate. An opening is formed in the insulating layer while leaving the first conductive layer intact. The opening narrows with a non-linear side or linear side. The opening can have a rectangular shape. A semiconductor die is mounted over the surface of the substrate. An underfill material is deposited between the semiconductor die and substrate. The opening in the insulating layer reduces a flow rate of the underfill material proximate to the opening. The flow rate of the underfill material proximate to the opening is substantially equal to a flow rate of the underfill material away from the opening.

Abstract translation: 半导体器件具有在衬底的表面上形成的衬底和绝缘层。 在衬底的表面上形成第一导电层。 在衬底的相对表面上形成第二导电层。 通过衬底形成导电通孔。 在绝缘层中形成开口，同时保持第一导电层的完整性。 开口以非线性侧面或线性侧面变窄。 开口可以具有矩形形状。 半导体管芯安装在衬底的表面上。 在半导体管芯和衬底之间沉积底部填充材料。 绝缘层中的开口减小靠近开口的底部填充材料的流速。 靠近开口的底部填充材料的流速基本上等于底部填充材料远离开口的流速。

公开(公告)号：US20080105965A1

公开(公告)日：2008-05-08

申请号：US12005499

申请日：2007-12-26

Applicant: Sungmin Song ,  Choong Bin Yim ,  Seongmin Lee ,  Jaehyun Lim ,  Joungin Yang ,  Dongsam Park

Inventor： Sungmin Song ,  Choong Bin Yim ,  Seongmin Lee ,  Jaehyun Lim ,  Joungin Yang ,  Dongsam Park

IPC: H01L23/02

CPC classification number: H01L23/3128 ,  H01L24/48 ,  H01L24/73 ,  H01L25/03 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/16 ,  H01L25/162 ,  H01L2224/0401 ,  H01L2224/06135 ,  H01L2224/06136 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/4824 ,  H01L2224/48465 ,  H01L2224/73204 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/1023 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2225/1088 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/19105 ,  H01L2924/19107 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A stacked integrated circuit package-in-package system is provided forming a first device having a first integrated circuit package comprises forming a first substrate with a first integrated circuit thereon, electrically connecting first electrical interconnects between the first integrated circuit and a top side of the first substrate, encapsulating a first top molding compound to cover the first electrical interconnects and a portion of the top side of the first substrate, and encapsulating a first bottom molding compound to cover the first integrated circuit and a bottom side the first substrate, and stacking a second device, having a second integrated circuit package, below the first device with a second top molding compound of the second device providing a space between the first device and the second device, wherein the second device includes the second top molding compound and a second bottom molding compound in a similar manner to the first device.

Abstract translation: 提供了一种堆叠式集成电路封装封装系统，其形成具有第一集成电路封装的第一器件，其包括在其上形成具有第一集成电路的第一衬底，电连接第一集成电路和第一集成电路的顶侧之间的第一电互连 第一基板，封装第一顶部模制化合物以覆盖第一电气互连和第一基板的顶侧的一部分，并且封装第一底部模制化合物以覆盖第一集成电路，底侧覆盖第一基板，并且堆叠 第二装置，具有第二集成电路封装，在第一装置下方具有第二装置的第二顶部模制化合物，其在第一装置和第二装置之间提供空间，其中第二装置包括第二顶部模塑料和第二装置 底部模塑料与第一装置类似。

公开(公告)号：US09401289B2

公开(公告)日：2016-07-26

申请号：US13488029

申请日：2012-06-04

Applicant: MinJung Kim ,  KyungHoon Lee ,  JoungIn Yang ,  WonIl Kwon ,  DaeSik Choi

Inventor： MinJung Kim ,  KyungHoon Lee ,  JoungIn Yang ,  WonIl Kwon ,  DaeSik Choi

IPC: H01L21/78 ,  H01L21/56 ,  H01L23/31 ,  H01L21/683

CPC classification number: H01L21/561 ,  H01L21/568 ,  H01L21/6835 ,  H01L21/6836 ,  H01L21/78 ,  H01L23/3114 ,  H01L23/3171 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2224/1132 ,  H01L2224/11334 ,  H01L2224/1145 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/11849 ,  H01L2224/11901 ,  H01L2224/13022 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

Abstract: A semiconductor device has a semiconductor wafer with an interconnect structure formed over a first surface of the wafer. A trench is formed in a non-active area of the semiconductor wafer from the first surface partially through the semiconductor wafer. A protective coating is formed over the first surface and into the trench. A lamination tape is applied over the protective coating. A portion of a second surface of the semiconductor wafer is removed by backgrinding or wafer thinning to expose the protecting coating in the trench. A die attach film is applied over the second surface of the semiconductor wafer. A cut or modified region is formed in the die attach film under the trench using a laser. The semiconductor wafer is expanded to separate the cut or modified region of the die attach film and singulate the semiconductor wafer.

Abstract translation: 半导体器件具有形成在晶片的第一表面上的互连结构的半导体晶片。 在半导体晶片的非有源区域中，部分地通过半导体晶片从第一表面形成沟槽。 在第一表面和沟槽中形成保护涂层。 在保护涂层上涂覆层压胶带。 半导体晶片的第二表面的一部分通过背面研磨或晶片变薄去除以暴露沟槽中的保护涂层。 将芯片附着膜施加在半导体晶片的第二表面上。 使用激光在沟槽下的管芯附着膜中形成切割或改性区域。 半导体晶片被扩展以分离芯片附着膜的切割或改性区域并使半导体晶片分离。

公开(公告)号：US20130334714A1

公开(公告)日：2013-12-19

申请号：US13526877

申请日：2012-06-19

Applicant: YiSu Park ,  KyungHoon Lee ,  JoungIn Yang ,  SangMi Park ,  DaeSik Choi

Inventor： YiSu Park ,  KyungHoon Lee ,  JoungIn Yang ,  SangMi Park ,  DaeSik Choi

IPC: H01L23/28 ,  H01L21/56

CPC classification number: H01L23/3135 ,  H01L2224/16225 ,  H01L2924/15311

Abstract: A method of manufacture of an integrated circuit packaging system includes providing a substrate; connecting an integrated circuit die; forming a molding having a temperature-dependent characteristic directly on the top surface of the substrate; and forming a coupling encapsulation having a coupled characteristic different from the temperature-dependent characteristic directly on the molding forms an encapsulation boundary between the coupling encapsulation and the molding.

Abstract translation: 一种集成电路封装系统的制造方法，包括：提供基板; 连接集成电路管芯; 在衬底的顶表面上直接形成具有温度依赖特性的模制品; 并且形成具有与温度相关特性不同的耦合特性的耦合封装，直接在模塑件上形成耦合封装和模制件之间的封装边界。

公开(公告)号：US07986048B2

公开(公告)日：2011-07-26

申请号：US12388516

申请日：2009-02-18

Applicant: DongSam Park ,  JoungIn Yang

Inventor： DongSam Park ,  JoungIn Yang

IPC: H01L23/48 ,  H01L21/44

CPC classification number: H01L23/5226 ,  H01L21/565 ,  H01L21/6835 ,  H01L23/3128 ,  H01L23/49827 ,  H01L24/28 ,  H01L24/48 ,  H01L24/73 ,  H01L24/82 ,  H01L24/97 ,  H01L25/105 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/014 ,  H01L2924/078 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/3511 ,  H01L2224/85 ,  H01L2224/83 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A method of manufacture of a package-on-package system includes: providing a package substrate; attaching a semiconductor die to the package substrate; forming an encapsulant around the semiconductor die to have a bottom exposed surface coplanar with a bottom surface of the package substrate and to have a top exposed surface with through openings extending therefrom through the bottom exposed surface; and creating through vias by applying solder into the through openings.

Abstract translation: 包装封装系统的制造方法包括：提供封装衬底; 将半导体管芯附接到所述封装衬底; 在所述半导体管芯周围形成密封剂以具有与所述封装衬底的底表面共面的底部暴露表面，并且具有顶部暴露表面，所述顶部暴露表面具有从其穿过所述底部暴露表面延伸的通孔; 并通过将焊料施加到通孔中而形成通孔。

公开(公告)号：US07901987B2

公开(公告)日：2011-03-08

申请号：US12051280

申请日：2008-03-19

Applicant: Joungin Yang ,  Dongjin Jung

Inventor： Joungin Yang ,  Dongjin Jung

IPC: H01L21/44

CPC classification number: H01L25/105 ,  H01L23/3128 ,  H01L24/73 ,  H01L25/03 ,  H01L25/0657 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2225/06568 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/00012 ,  H01L2924/00

Abstract: A package-on-package system includes: forming a first integrated circuit package including second top electrical contacts and first external electrical contacts on opposite sides thereof; forming an internal stacking module interposer including first top electrical contacts and base electrical connectors on opposite sides thereof; attaching the internal stacking module interposer to the first integrated circuit package with the first top electrical contacts connected to the second top electrical contacts; and molding a package encapsulant over the first integrated circuit package and around the internal stacking module interposer leaving a package encapsulant cavity for attaching a stacked package to the base electrical connectors.

Abstract translation: 封装封装系统包括：形成第一集成电路封装，其包括第二顶部电触点和在其相对侧上的第一外部电触点; 形成内部堆叠模块插入件，其包括在其相对侧上的第一顶部电触头和基座电连接器; 将内部堆叠模块插入件附接到第一集成电路封装，其中第一顶部电触点连接到第二顶部电触头; 以及在所述第一集成电路封装上并围绕所述内部堆叠模块插入件模制封装密封剂，留下用于将堆叠封装附接到所述基座电连接器的封装密封腔。

公开(公告)号：US20100237482A1

公开(公告)日：2010-09-23

申请号：US12408662

申请日：2009-03-20

Applicant: JoungIn Yang ,  Dongjin Jung ,  DongSam Park

Inventor： JoungIn Yang ,  Dongjin Jung ,  DongSam Park

IPC: H01L23/52 ,  H01L21/98

CPC classification number: H01L23/49816 ,  H01L23/3128 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/1011 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/3511 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A method of manufacture of an integrated circuit packaging system includes: forming a base package having a base interposer; forming an intermediate package having an intermediate interposer and an intermediate package embedded link trace, the intermediate package embedded link trace being encapsulated in an intermediate package mold compound; forming a cap package having a cap interposer; and connecting the intermediate package to the cap package and the base package using the intermediate package embedded link trace.

Abstract translation: 一种集成电路封装系统的制造方法，包括：形成具有基底插入件的基底封装; 形成具有中间插入件和中间封装嵌入链节迹线的中间封装，所述中间封装嵌入链节迹线封装在中间封装模具化合物中; 形成具有盖插入件的盖封装; 以及使用所述中间封装的嵌入式链路迹线将所述中间封装连接到所述封装封装和所述基底封装。

公开(公告)号：US20090236754A1

公开(公告)日：2009-09-24

申请号：US12053760

申请日：2008-03-24

Applicant: Joungin Yang ,  YoungSik Cho ,  Nam Ju Cho

Inventor： Joungin Yang ,  YoungSik Cho ,  Nam Ju Cho

IPC: H01L23/48 ,  H01L21/58

CPC classification number: H01L25/03 ,  H01L21/568 ,  H01L23/3121 ,  H01L24/16 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73215 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2225/06562 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19107 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: An integrated circuit package system includes: providing a module substrate having dimension predetermined for attachment adjacent a device; attaching a module die adjacent the module substrate; and applying a module molding material cantilevered from the module substrate and over the module die.

Abstract translation: 集成电路封装系统包括：提供具有预定尺寸的模块衬底，用于附接在器件附近; 在模块基板附近安装模块; 并且将从模块基板悬臂的模块成型材料应用到模块模具上。