P-type NiO conducting film for organic solar cell, a method for preparation of NiO conducting film, and an organic solar cell with enhanced light-to-electric energy conversion using the same
    2.
    发明申请
    P-type NiO conducting film for organic solar cell, a method for preparation of NiO conducting film, and an organic solar cell with enhanced light-to-electric energy conversion using the same 审中-公开
    用于有机太阳能电池的P型NiO导电膜,用于制备NiO导电膜的方法以及使用其的具有增强的光 - 电能转换的有机太阳能电池

    公开(公告)号:US20110108116A1

    公开(公告)日:2011-05-12

    申请号:US12895986

    申请日:2010-10-01

    摘要: A p-type NiO conducting film for an organic solar cell, a preparation method thereof, and an organic solar cell using the same and having enhanced power conversion efficiency, are provided, wherein the NiO conducting film is fabricated by vacuum sputtering in which nickel or nickel oxide is used as a target material, and argon, oxygen or the mixed gas of the argon and the oxygen is supplied. The p-type NiO conducting film may be easily prepared by vacuum sputtering, and since a n-type conducting film is prepared by simply coating sol-phase precursor solution, the NiO conducting film and the organic solar cells having the NiO conducting film in the order of the NiO conducting film, a photoactive layer, and a n-type conducting film, have enhanced electric energy conversion. As a result, the provided disclosure is useful particularly when applied in organic solar cells and organic light emitting devices.

    摘要翻译: 提供了一种用于有机太阳能电池的p型NiO导电膜,其制备方法和使用其的具有增强的功率转换效率的有机太阳能电池,其中NiO导电膜通过真空溅射制造,其中镍或 使用氧化镍作为目标材料,并且供应氩气,氧气或氩气和氧气的混合气体。 p型NiO导电膜可以通过真空溅射容易地制备,并且由于通过简单地涂布溶胶相前体溶液制备n型导电膜,所以NiO导电膜和具有NiO导电膜的有机太阳能电池在 NiO导电膜,光敏层和n型导电膜的顺序具有增强的电能转换。 结果,所提供的公开内容尤其适用于有机太阳能电池和有机发光器件中。

    Method for manufacturing semiconductor device having a capacitor
    3.
    发明授权
    Method for manufacturing semiconductor device having a capacitor 有权
    具有电容器的半导体器件的制造方法

    公开(公告)号:US07816222B2

    公开(公告)日:2010-10-19

    申请号:US12127340

    申请日:2008-05-27

    IPC分类号: H01L21/8242

    CPC分类号: H01L28/91 H01L27/10852

    摘要: A semiconductor device and a method for manufacturing the same are provided. The semiconductor device includes cylinder type bottom electrodes connected to a contact plug formed over a semiconductor substrate, and a supporting pattern formed between the cylinder type bottom electrodes, wherein a portion of sidewalls of the bottom electrodes is higher than the supporting pattern and the other portion of the sidewalls of the bottom electrode is lower than the supporting pattern.

    摘要翻译: 提供半导体器件及其制造方法。 半导体器件包括连接到形成在半导体衬底上的接触插塞的圆筒型底部电极和形成在气缸型底部电极之间的支撑图案,其中底部电极的侧壁的一部分高于支撑图案,而另一部分 的底部电极的侧壁比支撑图案低。

    SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
    5.
    发明申请
    SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME 审中-公开
    半导体器件及其制造方法

    公开(公告)号:US20100213617A1

    公开(公告)日:2010-08-26

    申请号:US12763760

    申请日:2010-04-20

    IPC分类号: H01L23/48

    CPC分类号: H01L28/91 H01L27/10852

    摘要: A semiconductor device and a method for manufacturing the same are provided. The semiconductor device includes cylinder type bottom electrodes connected to a contact plug formed over a semiconductor substrate, and a supporting pattern formed between the cylinder type bottom electrodes, wherein a portion of sidewalls of the bottom electrodes is higher than the supporting pattern and the other portion of the sidewalls of the bottom electrode is lower than the supporting pattern.

    摘要翻译: 提供半导体器件及其制造方法。 半导体器件包括连接到形成在半导体衬底上的接触插塞的圆筒型底部电极和形成在气缸型底部电极之间的支撑图案,其中底部电极的侧壁的一部分高于支撑图案,而另一部分 的底部电极的侧壁比支撑图案低。

    Method for forming shallow trench isolation of semiconductor device
    6.
    发明授权
    Method for forming shallow trench isolation of semiconductor device 失效
    半导体器件浅沟槽隔离的形成方法

    公开(公告)号:US07615461B2

    公开(公告)日:2009-11-10

    申请号:US11944748

    申请日:2007-11-26

    IPC分类号: H01L21/30

    摘要: A method for forming a shallow trench isolation (STI) of a semiconductor device comprises forming a nitride film pattern over a semiconductor substrate having a defined lower structure, etching a predetermined thickness of the semiconductor substrate using the nitride film pattern as a mask to form a trench having a vertical sidewall in a portion of the substrate predetermined to be a device isolation region, performing a plasma treatment process on the sidewall of the trench to form a plasma oxide film, forming an oxide film over the resulting structure to fill the trench, and performing a planarization process over the resulting structure.

    摘要翻译: 用于形成半导体器件的浅沟槽隔离(STI)的方法包括在具有限定的下部结构的半导体衬底上形成氮化物膜图案,使用氮化物膜图案作为掩模蚀刻半导体衬底的预定厚度以形成 沟槽,其在预定为器件隔离区的衬底的一部分中具有垂直侧壁,对沟槽的侧壁进行等离子体处理处理以形成等离子体氧化物膜,在所得结构上形成氧化膜以填充沟槽, 并对结果进行平坦化处理。

    Method for manufacturing semiconductor device
    7.
    发明授权
    Method for manufacturing semiconductor device 失效
    制造半导体器件的方法

    公开(公告)号:US07585780B2

    公开(公告)日:2009-09-08

    申请号:US11771573

    申请日:2007-06-29

    申请人: Jong Kuk Kim

    发明人: Jong Kuk Kim

    IPC分类号: H01L21/302 H01L21/461

    CPC分类号: H01L28/90 H01L27/10852

    摘要: A method for manufacturing a semiconductor device comprises: forming an interlayer insulating film including a storage node contact plug over a semiconductor substrate; forming an etching barrier film, a sacrificial insulating film, and a hard mask film over the storage node contact plug and the interlayer insulating film; forming a first storage node region by removing a portion of the sacrificial insulating film and the hard mask film by an etching process such that a polymer film is formed at a sidewall of the hard mask film and the sacrificial insulating film; and forming a second storage node region by removing the remaining portions of the sacrificial insulating film and the etching barrier film, thereby exposing the storage node contact plug. The method prevents a bowing phenomenon in the etching process for forming a storage node region and thus allows storage nodes having substantially vertical profiles to be formed.

    摘要翻译: 一种制造半导体器件的方法包括:在半导体衬底上形成包括存储节点接触插塞的层间绝缘膜; 在所述存储节点接触插塞和所述层间绝缘膜上形成蚀刻阻挡膜,牺牲绝缘膜和硬掩模膜; 通过蚀刻处理去除一部分牺牲绝缘膜和硬掩模膜以形成第一存储节点区域,使得聚合物膜形成在硬掩模膜和牺牲绝缘膜的侧壁处; 以及通过去除所述牺牲绝缘膜和所述蚀刻阻挡膜的剩余部分来形成第二存储节点区域,从而使所述存储节点接触插头露出。 该方法防止在用于形成存储节点区域的蚀刻工艺中的弯曲现象,并且因此允许形成具有基本竖直轮廓的存储节点。

    APPARATUS AND METHOD FOR TRANSMITTING OFDMA SYMBOLS
    9.
    发明申请
    APPARATUS AND METHOD FOR TRANSMITTING OFDMA SYMBOLS 有权
    用于发送OFDMA符号的装置和方法

    公开(公告)号:US20080117872A1

    公开(公告)日:2008-05-22

    申请号:US11940697

    申请日:2007-11-15

    IPC分类号: H04Q7/00

    摘要: Embodiments of the present invention may provide an apparatus and a method for transmitting an orthogonal frequency division multiplexing access (OFDMA) symbol in an OFDMA system. A bandwidth limit parameter for generating an OFDMA symbol may be adaptively determined based on the received signal quality of a receiver. An OFDMA symbol may be generated based on the bandwidth limit parameter and transmitted to the receiver. According to embodiments, when the received signal quality of the receiver is bad, the bandwidth limit parameter may be first adjusted before the modulation scheme is changed to have a lower data rate. In such a case, the downlink date rate may be maintained with enhancing the received signal quality of the receiver.

    摘要翻译: 本发明的实施例可以提供一种用于在OFDMA系统中发送正交频分复用接入(OFDMA)符号的装置和方法。 可以基于接收机的接收信号质量自适应地确定用于生成OFDMA符号的带宽限制参数。 OFDMA符号可以基于带宽限制参数生成并发送到接收机。 根据实施例,当接收机的接收信号质量不良时,可以在调制方案被改变为具有较低的数据速率之前,首先调整带宽限制参数。 在这种情况下,可以通过增强接收机的接收信号质量来维持下行链路日期速率。

    Method for forming metal contact in semiconductor device
    10.
    发明申请
    Method for forming metal contact in semiconductor device 失效
    在半导体器件中形成金属接触的方法

    公开(公告)号:US20070148858A1

    公开(公告)日:2007-06-28

    申请号:US11479287

    申请日:2006-06-29

    申请人: Jae Yu Jong-Kuk Kim

    发明人: Jae Yu Jong-Kuk Kim

    IPC分类号: H01L21/8242 H01L21/4763

    摘要: A method for forming a metal contact in a semiconductor device includes forming bit lines over a substrate defined into a cell region and a peripheral region, forming a first inter-layer dielectric (ILD) layer over the bit lines, forming a first etch stop layer over the first ILD layer, forming a capacitor in the cell region, forming a second etch stop layer over the substrate after the capacitor is formed, forming a second ILD layer over the second etch stop layer, performing a first etching process to etch portions of the second ILD layer and the second etch stop layer to thereby form first metal contact holes exposing the first etch stop layer, and performing a second etching process to etch portions of the first etch stop layer and the first ILD layer to thereby form second metal contact holes exposing the bit lines.

    摘要翻译: 一种用于在半导体器件中形成金属接触的方法包括在限定在单元区域和周边区域中的衬底上形成位线,在位线之上形成第一层间电介质(ILD)层,形成第一蚀刻停止层 在第一ILD层上,在单元区域中形成电容器,在形成电容器之后在衬底上形成第二蚀刻停止层,在第二蚀刻停止层上形成第二ILD层,执行第一蚀刻工艺以蚀刻部分 第二ILD层和第二蚀刻停止层,从而形成暴露第一蚀刻停止层的第一金属接触孔,以及执行第二蚀刻工艺以蚀刻第一蚀刻停止层和第一ILD层的部分,从而形成第二金属接触 孔露出位线。