公开(公告)号：US09799523B2

公开(公告)日：2017-10-24

申请号：US14880882

申请日：2015-10-12

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Hui OuYang ,  Jean-Luc Everaert ,  Laura Nyns ,  Rita Vos

IPC: H01L21/28 ,  H01L21/02 ,  H01L21/314 ,  H01L21/316 ,  H01L29/423 ,  H01L29/51

CPC classification number: H01L21/28167 ,  H01L21/02057 ,  H01L21/0206 ,  H01L21/02236 ,  H01L21/02255 ,  H01L21/28194 ,  H01L21/28211 ,  H01L21/3141 ,  H01L21/31645 ,  H01L21/31654 ,  H01L29/42364 ,  H01L29/513 ,  H01L29/517

Abstract: The present disclosure relates to methods for forming a high-k gate dielectric, the methods comprising the steps of providing a semiconductor substrate, cleaning the substrate, performing a thermal treatment, and performing a high-k dielectric material deposition, wherein said thermal treatment step is performed in a non-oxidizing ambient, leading to the formation of a thin interfacial layer between said semiconductor substrate and said high-k dielectric material and wherein the thickness of said thin interfacial layer is less than 10 Å.

公开(公告)号：US20120208375A1

公开(公告)日：2012-08-16

申请号：US13453206

申请日：2012-04-23

Applicant: Tadahiro Ohmi ,  Shigetoshi Sugawa ,  Akinobu Teramoto ,  Hiroshi Akahori ,  Keiichi Nii

Inventor： Tadahiro Ohmi ,  Shigetoshi Sugawa ,  Akinobu Teramoto ,  Hiroshi Akahori ,  Keiichi Nii

IPC: H01L21/316 ,  H01L21/314

CPC classification number: H01L21/3185 ,  H01L21/0214 ,  H01L21/02142 ,  H01L21/02164 ,  H01L21/02175 ,  H01L21/02238 ,  H01L21/02271 ,  H01L21/02301 ,  H01L21/30604 ,  H01L21/31654 ,  H01L21/318 ,  H01L29/6659

Abstract: In a semiconductor device formed on a silicon surface which has a substantial (110) crystal plane orientation, the silicon surface is flattened so that an arithmetical mean deviation of surface Ra is not greater than 0.15 nm, preferably, 0.09 nm, which enables to manufacture an n-MOS transistor of a high mobility. Such a flattened silicon surface is obtained by repeating a deposition process of a self-sacrifice oxide film in an oxygen radical atmosphere and a removing process of the self-sacrifice oxide film, by cleaning the silicon surface in deaerated H2O or a low OH density atmosphere, or by strongly terminating the silicon surface by hydrogen or heavy hydrogen. The deposition process of the self-sacrifice oxide film may be carried out by isotropic oxidation.

Abstract translation: 在形成在具有大致（110）晶面取向的硅表面上的半导体器件中，硅表面变平，使得表面Ra的算术平均偏差不大于0.15nm，优选为0.09nm，这使得能够制造 高迁移率的n-MOS晶体管。 通过在脱氧H 2 O或低OH密度气氛中清洗硅表面，通过在氧自由基气氛中重复自牺牲氧化物膜的沉积工艺和自牺牲氧化物膜的去除工艺来获得这种扁平化的硅表面 ，或通过氢或重氢强烈地终止硅表面。 自牺牲氧化膜的沉积工艺可以通过各向同性氧化进行。

公开(公告)号：US08034179B2

公开(公告)日：2011-10-11

申请号：US12865969

申请日：2009-02-06

Applicant: Yoshiro Kabe ,  Junichi Kitagawa ,  Kikuo Yamabe

Inventor： Yoshiro Kabe ,  Junichi Kitagawa ,  Kikuo Yamabe

IPC: H01L21/31 ,  H01L21/469

CPC classification number: H01L21/3105 ,  C23C16/0272 ,  C23C16/402 ,  C23C16/45565 ,  C23C16/511 ,  H01L21/02164 ,  H01L21/02238 ,  H01L21/02271 ,  H01L21/02304 ,  H01L21/28008 ,  H01L21/31612 ,  H01L21/31654 ,  H01L29/4908 ,  H01L29/513 ,  H01L29/66765

Abstract: In order to form an insulating film, which constitutes a flat interface with silicon, by CVD, a surface of silicon is oxidized to form a silicon oxide film using a plasma treatment apparatus in which microwaves are introduced into a chamber through a flat antenna having a plurality of holes. A silicon oxide film is formed as an insulating film on the silicon oxide film by CVD. Further, in the plasma treatment apparatus, a treating gas containing a noble gas and oxygen is introduced into the chamber, and, further, microwaves are introduced into the chamber through the flat antenna. Plasma is generated under a pressure in the range of not less than 6.7 Pa and not more than 533 Pa to modify the insulating film with the plasma.

Abstract translation: 为了通过CVD形成与硅形成平坦界面的绝缘膜，使用等离子体处理装置将硅的表面氧化形成氧化硅膜，其中微波通过具有 多个孔。 通过CVD在氧化硅膜上形成氧化硅膜作为绝缘膜。 此外，在等离子体处理装置中，将含有惰性气体和氧气的处理气体引入室内，并且还通过平板天线将微波引入室内。 在不低于6.7Pa且不大于533Pa的压力下产生等离子体，以便用等离子体改性绝缘膜。

公开(公告)号：US07816237B2

公开(公告)日：2010-10-19

申请号：US12132698

申请日：2008-06-04

Applicant: Huajie Chen ,  Omer H. Dokumaci ,  Oleg G. Gluschenkov ,  Werner A. Rausch

Inventor： Huajie Chen ,  Omer H. Dokumaci ,  Oleg G. Gluschenkov ,  Werner A. Rausch

IPC: H01L21/20 ,  H01L21/36

CPC classification number: H01L21/26533 ,  H01L21/02238 ,  H01L21/26513 ,  H01L21/31654 ,  H01L21/31675 ,  H01L21/324 ,  H01L29/0847 ,  H01L29/66636

Abstract: A method of forming a field effect transistor creates shallower and sharper junctions, while maximizing dopant activation in processes that are consistent with current manufacturing techniques. More specifically, the invention increases the oxygen content of the top surface of a silicon substrate. The top surface of the silicon substrate is preferably cleaned before increasing the oxygen content of the top surface of the silicon substrate. The oxygen content of the top surface of the silicon substrate is higher than other portions of the silicon substrate, but below an amount that would prevent epitaxial growth. This allows the invention to epitaxially grow a silicon layer on the top surface of the silicon substrate. Further, the increased oxygen content substantially limits dopants within the epitaxial silicon layer from moving into the silicon substrate.

Abstract translation: 形成场效应晶体管的方法产生更浅和更尖的结，同时在与当前制造技术一致的工艺中最大化掺杂剂活化。 更具体地，本发明增加了硅衬底的顶表面的氧含量。 优选在增加硅衬底的顶表面的氧含量之前清洁硅衬底的顶表面。 硅衬底的顶表面的氧含量高于硅衬底的其它部分，但低于防止外延生长的量。 这允许本发明在硅​​衬底的顶表面上外延生长硅层。 此外，增加的氧含量基本上限制外延硅层内的掺杂剂移动到硅衬底中。

公开(公告)号：US07615461B2

公开(公告)日：2009-11-10

申请号：US11944748

申请日：2007-11-26

Applicant: Seung Bum Kim ,  Jong Kuk Kim

Inventor： Seung Bum Kim ,  Jong Kuk Kim

IPC: H01L21/30

CPC classification number: H01L21/76224 ,  H01L21/02233 ,  H01L21/02252 ,  H01L21/3065 ,  H01L21/31654

Abstract: A method for forming a shallow trench isolation (STI) of a semiconductor device comprises forming a nitride film pattern over a semiconductor substrate having a defined lower structure, etching a predetermined thickness of the semiconductor substrate using the nitride film pattern as a mask to form a trench having a vertical sidewall in a portion of the substrate predetermined to be a device isolation region, performing a plasma treatment process on the sidewall of the trench to form a plasma oxide film, forming an oxide film over the resulting structure to fill the trench, and performing a planarization process over the resulting structure.

Abstract translation: 用于形成半导体器件的浅沟槽隔离（STI）的方法包括在具有限定的下部结构的半导体衬底上形成氮化物膜图案，使用氮化物膜图案作为掩模蚀刻半导体衬底的预定厚度以形成 沟槽，其在预定为器件隔离区的衬底的一部分中具有垂直侧壁，对沟槽的侧壁进行等离子体处理处理以形成等离子体氧化物膜，在所得结构上形成氧化膜以填充沟槽， 并对结果进行平坦化处理。

公开(公告)号：US07256104B2

公开(公告)日：2007-08-14

申请号：US10841621

申请日：2004-05-10

Applicant: Masataka Ito ,  Kenji Yamagata ,  Yasuo Kakizaki ,  Kazuhito Takanashi ,  Hiroshi Miyabayashi ,  Ryuji Moriwaki ,  Takashi Tsuboi

Inventor： Masataka Ito ,  Kenji Yamagata ,  Yasuo Kakizaki ,  Kazuhito Takanashi ,  Hiroshi Miyabayashi ,  Ryuji Moriwaki ,  Takashi Tsuboi

IPC: H01L21/46 ,  H01L21/30 ,  H01L21/762

CPC classification number: H01L22/12 ,  H01L21/30604 ,  H01L21/31056 ,  H01L21/31654 ,  H01L21/32134 ,  H01L21/6708 ,  H01L21/76254 ,  H01L21/76259 ,  H01L22/20

Abstract: An SOI substrate which has a thick SOI layer is first prepared. Then, the SOI layer is thinned to a target film thickness using as a unit a predetermined thickness not more than that of one lattice. This thinning is performed by repeating a unit thinning step which includes an oxidation step of oxidizing the surface of the SOI layer by the predetermined thickness not more than that of one lattice and a removal step of selectively removing silicon oxide formed by the oxidation. The SOI layer of the SOI substrate is chemically etched by supplying a chemical solution to the SOI layer, and the film thickness of the etched SOI layer is measured. When the measured film thickness of the SOI layer has a predetermined value, a process of chemically etching the SOI layer ends.

Abstract translation: 首先制备具有厚SOI层的SOI衬底。 然后，使用不大于一个晶格的预定厚度的单位将SOI层减薄到目标膜厚度。 这种稀化是通过重复单元稀化步骤进行的，该步骤包括将SOI层的表面氧化预定厚度不超过一个晶格的氧化步骤，以及选择性地除去氧化形成的氧化硅的去除步骤。 通过向SOI层提供化学溶液来对SOI衬底的SOI层进行化学蚀刻，并测量蚀刻的SOI层的膜厚。 当所测量的SOI层的膜厚度具有预定值时，SOI层的化学蚀刻处理结束。

公开(公告)号：US20070145535A1

公开(公告)日：2007-06-28

申请号：US11651034

申请日：2007-01-09

Applicant: Tadahiro Ohmi ,  Shigetoshi Sugawa ,  Akinobu Teramoto ,  Hiroshi Akahori ,  Keiichi Nii

Inventor： Tadahiro Ohmi ,  Shigetoshi Sugawa ,  Akinobu Teramoto ,  Hiroshi Akahori ,  Keiichi Nii

IPC: H01L29/06

CPC classification number: H01L21/3185 ,  H01L21/30604 ,  H01L21/31654 ,  H01L21/318 ,  H01L29/6659

Abstract: In a semiconductor device formed on a silicon surface which has a substantial (110) crystal plane orientation, the silicon surface is flattened so that an arithmetical mean deviation of surface Ra is not greater than 0.15 nm, preferably, 0.09 nm, which enables to manufacture an n-MOS transistor of a high mobility. Such a flattened silicon surface is obtained by repeating a deposition process of a self-sacrifice oxide film in an oxygen radical atmosphere and a removing process of the self-sacrifice oxide film, by cleaning the silicon surface in deaerated H2O or a low OH density atmosphere, or by strongly terminating the silicon surface by hydrogen or heavy hydrogen. The deposition process of the self-sacrifice oxide film may be carried out by isotropic oxidation.

Abstract translation: 在形成在具有大致（110）晶面取向的硅表面上的半导体器件中，硅表面变平，使得表面Ra的算术平均偏差不大于0.15nm，优选为0.09nm，这使得能够制造 高迁移率的n-MOS晶体管。 通过在脱氧H 2中清洗硅表面，通过在氧自由基气氛中重复自牺牲氧化物膜的沉积工艺和自牺牲氧化物膜的去除工艺来获得这种扁平化的硅表面， 或低OH密度气氛，或通过氢或重氢强烈地终止硅表面。 自牺牲氧化膜的沉积工艺可以通过各向同性氧化进行。

公开(公告)号：US20070134415A1

公开(公告)日：2007-06-14

申请号：US11563980

申请日：2006-11-28

Applicant: Ki-Hyun Hwang ,  U-In Chung ,  Yu-Gyun Shin ,  Jae-Young Ahn ,  Jin-Gyun Kim

Inventor： Ki-Hyun Hwang ,  U-In Chung ,  Yu-Gyun Shin ,  Jae-Young Ahn ,  Jin-Gyun Kim

IPC: C23C16/00 ,  B05D3/04 ,  B05D7/00 ,  B05D1/02

CPC classification number: H01L21/02233 ,  H01L21/31654

Abstract: An oxidation treatment apparatus for oxidizing a surface of a substrate includes a process chamber for performing a process, a boat supporting the substrate and disposed in the process chamber during the process and a first ozone supply unit supplying ozone to the process chamber. The first ozone supply unit includes an ozone generator disposed at an exterior of the process chamber and an ozone spray nozzle disposed in the process chamber to spray the ozone supplied from the ozone generator into the process chamber.

Abstract translation: 用于氧化基板表面的氧化处理装置包括处理过程的处理室，支撑基板的船，并且在处理过程中设置在处理室中，以及向处理室供应臭氧的第一臭氧供给单元。 第一臭氧供应单元包括设置在处理室外部的臭氧发生器和设置在处理室中的臭氧喷嘴，以将从臭氧发生器供应的臭氧喷射到处理室中。

公开(公告)号：US07033874B2

公开(公告)日：2006-04-25

申请号：US10863285

申请日：2004-06-09

Applicant: Kazuichiro Itonaga ,  Akihiro Yamamoto ,  Hiroaki Nakaoka ,  Isao Miyanaga ,  Yoshinao Harada

Inventor： Kazuichiro Itonaga ,  Akihiro Yamamoto ,  Hiroaki Nakaoka ,  Isao Miyanaga ,  Yoshinao Harada

IPC: H01L21/336 ,  H01L21/8234 ,  H01L21/302 ,  H01L21/461 ,  H01L21/31

CPC classification number: H01L21/31654 ,  H01L21/02238 ,  H01L21/02252 ,  H01L21/28247 ,  H01L21/31662 ,  H01L21/32 ,  H01L21/32105 ,  H01L21/76224 ,  H01L21/823842 ,  H01L21/823857

Abstract: With keeping an atmosphere including oxygen within a chamber and with a wafer kept at a low temperature, plasma generated within the chamber is biased toward the wafer, and the wafer is subjected to the plasma. A semiconductor layer exposed on the wafer is oxidized into an oxide film. Thus, an oxide film can be formed even at room temperature differently from thermal oxidation. This oxidation is applicable to recovery of an implantation protection insulating film having been etched in cleaning a photoresist film, relaxation of a step formed between polysilicon films, relaxation of a step formed within a trench and the like. Also, before removing a photoresist film used for forming a gate electrode including a metal, a contamination protection film can be formed by this oxidation with the photoresist film kept.

Abstract translation: 通过在室内保持包括氧的气氛，并且将晶片保持在低温下，在室内产生的等离子体朝向晶片偏置，并且晶片经受等离子体。 暴露在晶片上的半导体层被氧化成氧化膜。 因此，即使在室温下也可以形成与热氧化不同的氧化膜。 该氧化适用于在清洁光致抗蚀剂膜时蚀刻的注入保护绝缘膜的回收，多晶硅膜之间形成的台阶的松弛，沟槽内形成的台阶的松弛等。 此外，在去除用于形成包括金属的栅电极的光致抗蚀剂膜之前，可以通过保持光致抗蚀剂膜的这种氧化来形成污染保护膜。

公开(公告)号：US20040259328A1

公开(公告)日：2004-12-23

申请号：US10841621

申请日：2004-05-10

Applicant: Canon Kabushiki Kaisha

Inventor： Masataka Ito ,  Kenji Yamagata ,  Yasuo Kakizaki ,  Kazuhito Takanashi ,  Hiroshi Miyabayashi ,  Ryuji Moriwaki ,  Takashi Tsuboi

IPC: H01L021/46

CPC classification number: H01L22/12 ,  H01L21/30604 ,  H01L21/31056 ,  H01L21/31654 ,  H01L21/32134 ,  H01L21/6708 ,  H01L21/76254 ,  H01L21/76259 ,  H01L22/20

Abstract: An SOI substrate which has a thick SOI layer is first prepared. Then, the SOI layer is thinned to a target film thickness using as a unit a predetermined thickness not more than that of one lattice. This thinning is performed by repeating a unit thinning step which includes an oxidation step of oxidizing the surface of the SOI layer by the predetermined thickness not more than that of one lattice and a removal step of selectively removing silicon oxide formed by the oxidation. The SOI layer of the SOI substrate is chemically etched by supplying a chemical solution to the SOI layer, and the film thickness of the etched SOI layer is measured. When the measured film thickness of the SOI layer has a predetermined value, a process of chemically etching the SOI layer ends.

Abstract translation: 首先制备具有厚SOI层的SOI衬底。 然后，使用不大于一个晶格的预定厚度的单位将SOI层减薄到目标膜厚度。 这种稀化是通过重复单元稀化步骤进行的，该步骤包括将SOI层的表面氧化预定厚度不超过一个晶格的氧化步骤，以及选择性地除去氧化形成的氧化硅的去除步骤。 通过向SOI层提供化学溶液来对SOI衬底的SOI层进行化学蚀刻，并测量蚀刻的SOI层的膜厚。 当所测量的SOI层的膜厚度具有预定值时，SOI层的化学蚀刻处理结束。