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    Nonvolatile memory devices, operating methods thereof and memory systems including the same
    2.
    发明授权
    Nonvolatile memory devices, operating methods thereof and memory systems including the same 有权
    非易失性存储器件，其操作方法和包括其的存储器系统

    公开(公告)号：US09324440B2

    公开(公告)日：2016-04-26

    申请号：US14631341

    申请日：2015-02-25

    Applicant: Sang-Won Park ,  Dongku Kang ,  Jung-Yun Yun ,  Jinman Han ,  ChiWeon Yoon

    Inventor： Sang-Won Park ,  Dongku Kang ,  Jung-Yun Yun ,  Jinman Han ,  ChiWeon Yoon

    IPC: G11C16/16 ,  G11C16/14 ,  G11C16/04 ,  G11C16/34

    CPC classification number: G11C16/14 ,  G11C16/0483 ,  G11C16/16 ,  G11C16/3445 ,  H01L27/11582

    Abstract: The inventive concept relates to a nonvolatile memory device and methods for operating the same. The nonvolatile memory device comprises a plurality of strings arranged in rows and columns on a substrate, each string including at least one ground select transistor, a plurality of memory cells and at least one string select transistor sequentially stacked on the substrate. The method comprises erasing first memory cells corresponding to an erasure failed row and inhibiting erasure of second memory cells corresponding to an erasure passed row, and performing an erasure verification by a unit of each row with respect to the first memory cells.

    Abstract translation: 本发明构思涉及非易失性存储器件及其操作方法。 非易失性存储器件包括在衬底上以行和列布置的多个串，每个串包括至少一个接地选择晶体管，多个存储器单元和顺序堆叠在衬底上的至少一个串选择晶体管。 该方法包括：擦除对应于擦除失败行的第一存储单元，并禁止对与擦除通过的行相对应的第二存储单元的擦除，并以相对于第一存储单元的每行为单位进行擦除验证。

    Data storage system having multi-bit memory device and operating method thereof
    3.
    发明授权
    Data storage system having multi-bit memory device and operating method thereof 有权
    具有多位存储装置的数据存储系统及其操作方法

    公开(公告)号：US08976587B2

    公开(公告)日：2015-03-10

    申请号：US13737140

    申请日：2013-01-09

    Applicant: Sangyong Yoon ,  Kitae Park ,  Jinman Han ,  Wonseok Lee

    Inventor： Sangyong Yoon ,  Kitae Park ,  Jinman Han ,  Wonseok Lee

    IPC: G11C16/04 ,  G11C16/10 ,  G11C11/56 ,  G11C16/26 ,  G11C14/00

    CPC classification number: G11C16/10 ,  G11C11/56 ,  G11C11/5628 ,  G11C14/0018 ,  G11C16/0483 ,  G11C16/26 ,  G11C2211/5641 ,  G11C2211/5642 ,  G11C2211/5643

    Abstract: The operating method of a data storage device includes storing data in a buffer memory according to an external request, and determining whether the data stored in the buffer memory is data accompanying a buffer program operation of a memory cell array. When the data stored in the buffer memory is data accompanying the buffer program operation, the method further includes determining whether a main program operation on the memory cell array is required, and when a main program operation on the memory cell array is required, determining a program pattern of the main program operation on the memory cell array. The method further includes issuing a set of commands for the main program operation on the memory cell array to a multi-bit memory device based on the determined program pattern.

    Abstract translation: 数据存储装置的操作方法包括根据外部请求将数据存储在缓冲存储器中，并且确定存储在缓冲存储器中的数据是否是伴随存储器单元阵列的缓冲器程序操作的数据。 当存储在缓冲存储器中的数据是与缓冲器程序操作相关的数据时，该方法还包括确定是否需要对存储单元阵列的主程序操作，以及当需要存储单元阵列的主程序操作时， 存储单元阵列中的主程序操作的程序模式。 该方法还包括基于所确定的程序模式向存储器单元阵列发出用于主程序操作的一组命令到多位存储器件。

    Nonvolatile memory devices and programming methods thereof in which a program inhibit voltage is changed during programming
    5.
    发明授权
    Nonvolatile memory devices and programming methods thereof in which a program inhibit voltage is changed during programming 有权
    在编程期间改变程序禁止电压的非易失性存储器件及其编程方法

    公开(公告)号：US08588002B2

    公开(公告)日：2013-11-19

    申请号：US12830903

    申请日：2010-07-06

    Applicant: Jinman Han

    Inventor： Jinman Han

    IPC: G11C16/04

    CPC classification number: G11C16/0483 ,  G11C11/5628 ,  G11C16/10 ,  G11C2211/5621 ,  G11C2211/5642

    Abstract: Provided are nonvolatile memory devices and programming methods thereof. A non-volatile memory device is programmed by performing a plurality of programming loops on memory cells in a memory cell array and changing a program inhibit voltage applied to bit lines of the memory cells that have completed programming while performing the plurality of programming loops.

    Abstract translation: 提供了非易失性存储器件及其编程方法。 通过在存储单元阵列中的存储器单元上执行多个编程循环并改变在执行多个编程循环时施加到已完成编程的存储器单元的位线的程序禁止电压来编程非易失性存储器件。

    NONVOLATILE MEMORY DEVICES, OPERATING METHODS THEREOF AND MEMORY SYSTEMS INCLUDING THE SAME
    6.
    发明申请
    NONVOLATILE MEMORY DEVICES, OPERATING METHODS THEREOF AND MEMORY SYSTEMS INCLUDING THE SAME 有权
    非易失性存储器件，其操作方法和包括其的存储器系统

    公开(公告)号：US20110194357A1

    公开(公告)日：2011-08-11

    申请号：US12985695

    申请日：2011-01-06

    Applicant: Jinman Han ,  Donghyuk Chae

    Inventor： Jinman Han ,  Donghyuk Chae

    IPC: G11C16/04

    CPC classification number: G11C16/16 ,  G11C16/0483 ,  G11C16/08 ,  G11C16/14 ,  G11C16/26

    Abstract: Nonvolatile memory device, operating methods thereof, and memory systems including the same. In the operating method, a ground select line of a first string connected to a bit line may be floated. An erase prohibition voltage may be applied to a ground select line of a second string connected to the bit line. An erase operation voltage may be applied to the first and second strings.

    Abstract translation: 非易失性存储器件，其操作方法和包括该非易失性存储器件的存储器系统。 在操作方法中，连接到位线的第一串的接地选择线可以浮置。 可以将擦除禁止电压施加到连接到位线的第二串的接地选择线。 可以将擦除操作电压施加到第一和第二串。

    Flash memory device and method of programming the same
    9.
    发明授权
    Flash memory device and method of programming the same 有权
    闪存设备及其编程方法相同

    公开(公告)号：US08976584B2

    公开(公告)日：2015-03-10

    申请号：US13767535

    申请日：2013-02-14

    Applicant: Jinman Han ,  Ho-Chul Lee ,  Min-Su Kim ,  Sangwan Nam ,  Junghoon Park

    Inventor： Jinman Han ,  Ho-Chul Lee ,  Min-Su Kim ,  Sangwan Nam ,  Junghoon Park

    IPC: G11C11/34 ,  G06F12/02 ,  G11C16/04 ,  G11C16/34 ,  H01L27/115

    CPC classification number: G06F12/0246 ,  G11C16/0483 ,  G11C16/3418 ,  H01L27/11582

    Abstract: A method is provided for programming a flash memory device including memory cells formed in a direction perpendicular to a substrate, a first sub word line connected to first memory cells and selectable by a first selection line, and a second sub word line connected to second memory cells and selectable by a second selection line, the first and second memory cells being formed at the same level and being supplied with a program voltage at the same time. The method includes performing LSB program operations on the first and second sub word lines by enabling the first and second selection lines, respectively; performing CSB program operations on the first and second sub word lines by enabling the first and second selection lines, respectively; and performing MSB program operations on the first and second sub word lines by enabling the first and second selection lines, respectively.

    Abstract translation: 提供一种用于编程闪存器件的方法，所述闪存器件包括沿垂直于衬底的方向形成的存储器单元，连接到第一存储器单元并由第一选择线选择的第一子字线以及连接到第二存储器的第二子字线 并且可由第二选择线选择，第一和第二存储器单元在同一电平上形成，同时被提供有编程电压。 该方法包括分别通过启用第一和第二选择线来对第一和第二子字线执行LSB编程操作; 通过分别启用第一和第二选择线来对第一和第二子字线执行CSB编程操作; 以及通过分别启用第一和第二选择线来对第一和第二子字线执行MSB编程操作。

    Nonvolatile memory device, erasing method thereof, and memory system including the same
    10.
    发明授权
    Nonvolatile memory device, erasing method thereof, and memory system including the same 有权
    非易失性存储器件，其擦除方法和包括该非易失性存储器件的存储器系统

    公开(公告)号：US08848456B2

    公开(公告)日：2014-09-30

    申请号：US13967455

    申请日：2013-08-15

    Applicant: Jinman Han ,  Doogon Kim

    Inventor： Jinman Han ,  Doogon Kim

    IPC: G11C11/34 ,  G11C16/16 ,  G11C16/08 ,  G11C16/14 ,  G11C16/04

    CPC classification number: G11C16/14 ,  G11C16/04 ,  G11C16/08 ,  G11C16/16 ,  H01L27/1157 ,  H01L27/11582

    Abstract: Provided is an erasing method of a nonvolatile memory device. The erasing method applies a word line erase voltage to a plurality of word lines connected to the memory cells respectively, applies a specific voltage to a ground selection line connected to the ground selection transistor, applies an erase voltage to a substrate in which the memory string formed during the step applying the specific voltage to the ground selection line, and floats the ground selection line in response to a voltage change of the substrate.

    Abstract translation: 提供了一种非易失性存储器件的擦除方法。 擦除方法将字线擦除电压分别施加到连接到存储器单元的多个字线，向连接到接地选择晶体管的接地选择线施加特定电压，将擦除电压施加到其中存储器串 在施加特定电压到地选择线的步骤期间形成，并且响应于衬底的电压变化漂浮地选择线。

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