Method and system for achieving die parallelism through block interleaving
    2.
    发明授权
    Method and system for achieving die parallelism through block interleaving 有权
    通过块交错实现并行度的方法和系统

    公开(公告)号:US09092340B2

    公开(公告)日:2015-07-28

    申请号:US12642181

    申请日:2009-12-18

    摘要: A method and system for achieving die parallelism through block interleaving includes non-volatile memory having a multiple non-volatile memory dies, where each die has a cache storage area and a main storage area. A controller is configured to receive data and write sequentially addressed data to the cache storage area of a first die. The controller, after writing sequentially addressed data to the cache storage area of the first die equal to a block of the main storage area of the first die, writes additional data to a cache storage area of a next die until sequentially addressed data is written into the cache area of the next die equal to a block of the main storage area. The cache storage area may be copied to the main storage area on the first die while the cache storage area is written to on the next die.

    摘要翻译: 通过块交错实现管芯并行的方法和系统包括具有多个非易失性存储器管芯的非易失性存储器,其中每个管芯具有缓存存储区域和主存储区域。 控制器被配置为接收数据并将顺序寻址的数据写入到第一管芯的缓存存储区域。 控制器在将顺序寻址的数据写入与第一管芯的主存储区域的块相等的第一管芯的高速缓存存储区域之后,将附加数据写入下一个管芯的高速缓存存储区域,直到顺序寻址的数据被写入 下一个芯片的高速缓存区域等于主存储区域的块。 高速缓存存储区域可以被复制到第一裸片上的主存储区域,而缓存存储区域被写入到下一个芯片上。

    Block level grading for reliability and yield improvement
    3.
    发明授权
    Block level grading for reliability and yield improvement 有权
    块级分级可靠性和产量提高

    公开(公告)号:US08953398B2

    公开(公告)日:2015-02-10

    申请号:US13527199

    申请日:2012-06-19

    IPC分类号: G11C7/00

    摘要: A system for grading blocks may be used to improve memory usage. Blocks of memory, such as on a flash card, may be graded on a sliding scale that may identify a level of “goodness” or a level of “badness” for each block rather than a binary good or bad identification. This grading system may utilize at least three tiers of grades which may improve efficiency by better utilizing each block based on the individual grades for each block. The block leveling grading system may be used for optimizing the competing needs of minimizing yield loss while minimizing testing defect escapes.

    摘要翻译: 可以使用用于分级块的系统来改善存储器使用。 诸如闪存卡之类的存储器块可以在可以标识每个块的“良好”级别或“坏”级别的滑动标度上分级,而不是二进制好或坏标识。 该分级系统可以利用至少三个等级的等级,其可以通过基于每个块的各个等级更好地利用每个块来提高效率。 块调平分级系统可用于优化最小化产量损失的竞争需求,同时最小化测试缺陷逃逸。

    Systems and Methods for Performing Defect Detection and Data Recovery in a Memory System
    4.
    发明申请
    Systems and Methods for Performing Defect Detection and Data Recovery in a Memory System 有权
    在内存系统中执行缺陷检测和数据恢复的系统和方法

    公开(公告)号:US20140281682A1

    公开(公告)日:2014-09-18

    申请号:US13795460

    申请日:2013-03-12

    IPC分类号: G06F11/08

    摘要: Systems and methods for performing defect detection and data recovery within a memory system are disclosed. A controller of a memory system may receive a command to write data in a memory of the memory system; determine a physical location of the memory that is associated with the data write; write data associated with the data write to the physical location; and store the physical location of the memory that is associated with the data write in a Tag cache. The controller may further identify a data keep cache of a plurality of data keep caches that is associated with the data write based on the physical location of the memory that is associated with the data write; update an XOR sum based on the data of the data write; and store the updated XOR sum in the identified data keep cache.

    摘要翻译: 公开了用于在存储器系统内执行缺陷检测和数据恢复的系统和方法。 存储器系统的控制器可以接收在存储器系统的存储器中写入数据的命令; 确定与数据写入相关联的存储器的物理位置; 将与数据相关联的数据写入物理位置; 并将与数据写入相关联的存储器的物理位置存储在标签高速缓存中。 控制器可以基于与数据写入相关联的存储器的物理位置,进一步识别与数据写入相关联的多个数据保持高速缓存的数据保持高速缓存; 基于数据写入的数据更新XOR和; 并将更新的XOR和存储在所识别的数据保持缓存中。

    Wordline-to-wordline stress configuration
    5.
    发明授权
    Wordline-to-wordline stress configuration 有权
    字线到字线应力配置

    公开(公告)号:US08693259B2

    公开(公告)日:2014-04-08

    申请号:US13340437

    申请日:2011-12-29

    IPC分类号: G11C16/06

    摘要: A method and system for performing wordline-to-wordline stress routines on a storage device is disclosed. Stress routines may be performed to reduce state widening in multi-level memory cells in the storage device. However, data retention problems may result if the stress routines are performed too often. In order to perform the stress routines at the proper times, a stress control variable is used. The stress control variable may be indicative of age of the storage device (such as the number of erase cycles performed on a memory block in the storage device). The stress control variable is input to a look-up table (or other logical construct), with the output of the look-up table indicating whether to perform the wordline-to-wordline stress routine. In this way, the stress routines may be performed to reduce state widening while reducing the ill effects of data retention.

    摘要翻译: 公开了一种用于在存储设备上执行字线到字线应力程序的方法和系统。 可以执行应力程序以减少存储设备中的多级存储器单元中的状态变宽。 但是,如果压力程序太频繁地执行,则可能会导致数据保留问题。 为了在适当的时候执行压力程序,使用应力控制变量。 应力控制变量可以指示存储设备的年龄(例如在存储设备中的存储器块上执行的擦除周期的数量)。 压力控制变量被输入到查找表(或其他逻辑结构),查找表的输出指示是否执行字线到字线应力程序。 以这种方式,可以执行应力程序以减少状态扩大,同时减少数据保留的不良影响。

    Pre-emptive garbage collection of memory blocks
    6.
    发明授权
    Pre-emptive garbage collection of memory blocks 有权
    内存块的优先垃圾收集

    公开(公告)号:US08626986B2

    公开(公告)日:2014-01-07

    申请号:US12828241

    申请日:2010-06-30

    IPC分类号: G06F13/00

    CPC分类号: G06F12/0246 G06F12/0253

    摘要: A method and system pre-emptively perform garbage collection operations of a forced amount on update blocks in a memory device. The amount of garbage collection needed by a certain data write is monitored and adjusted to match the forced amount if necessary. Update blocks may be selected on the basis of their recent usage or the amount of garbage collection required. Another method and system may store control information about update blocks in a temporary storage area so that a greater number of update blocks are utilized. The sequential write performance measured by the Speed Class test may be optimized by using this method and system.

    摘要翻译: 一种方法和系统在存储器设备中的更新块上优先地执行强制量的垃圾回收操作。 监视和调整某些数据写入所需的垃圾回收量,以便在必要时与强制量匹配。 可以基于它们最近的使用或所需的垃圾收集量来选择更新块。 另一种方法和系统可以将关于更新块的控制信息存储在临时存储区域中,以便利用更多数量的更新块。 通过速度等级测试测量的顺序写入性能可以通过使用此方法和系统进行优化。

    Scrub Techniques for Use with Dynamic Read
    7.
    发明申请
    Scrub Techniques for Use with Dynamic Read 有权
    Scrub技术用于动态阅读

    公开(公告)号:US20130128666A1

    公开(公告)日:2013-05-23

    申请号:US13435476

    申请日:2012-03-30

    IPC分类号: G11C16/26

    摘要: The decision on whether to refresh or retire a memory block is based on the set of dynamic read values being used. In a memory system using a table of dynamic read values, the table is configured to include how to handle read error (retire, refresh) in addition to the read parameters for the different dynamic read cases. In a refinement, the read case number can used to prioritize blocks selected for refresh or retire. In cases where the read scrub is to be made more precise, multiple dynamic read cases can be applied. Further, which cases are applied can be intelligently selected.

    摘要翻译: 关于是否刷新或退出内存块的决定是基于正在使用的一组动态读取值。 在使用动态读取值表的存储器系统中,该表被配置为包括如何处理读取错误(退出,刷新)以及不同动态读取情况的读取参数。 在细化中,读取案例编号可用于为选择刷新或退出的块确定优先级。 在读取擦除更精确的情况下,可以应用多个动态读取情况。 此外,可以智能地选择应用哪些情况。

    PHASED NAND POWER-ON RESET
    8.
    发明申请
    PHASED NAND POWER-ON RESET 有权
    复位NAND上电复位

    公开(公告)号:US20110271036A1

    公开(公告)日:2011-11-03

    申请号:US12770358

    申请日:2010-04-29

    IPC分类号: G06F12/00 G06F1/26 G06F12/02

    CPC分类号: G06F1/24

    摘要: A method and system for phasing power-intensive operations is disclosed. A non-volatile storage device controller detects a power reset. The controller is in communication with non-volatile memories in the non-volatile storage device. In response to detecting a power reset, the controller determines a current consumption necessary to reset the non-volatile memories in the non-volatile storage device. The controller simultaneously resets all of the non-volatile memories when the determined current consumption is less than a current consumption threshold. If the determined current consumption is greater than the current consumption threshold, the controller resets a first subset of the plurality of non-volatile memories, and after a predetermined delay, resets a second subset of the non-volatile memories. Therefore, a power-intensive operation may be performed without exceeding a current consumption threshold by dividing the operation into a sequence of steps that do not exceed the threshold.

    摘要翻译: 公开了一种用于阶段性强力密集型操作的方法和系统。 非易失性存储设备控制器检测电源复位。 控制器与非易失性存储设备中的非易失性存储器通信。 响应于检测到电源复位,控制器确定复位非易失性存储设备中的非易失性存储器所需的电流消耗。 当确定的电流消耗小于电流消耗阈值时,控制器同时复位所有非易失性存储器。 如果确定的电流消耗大于当前消耗阈值,则控制器复位多个非易失性存储器的第一子集,并且在预定延迟之后,复位非易失性存储器的第二子集。 因此,通过将操作划分成不超过阈值的一系列步骤,可以不超过电流消耗阈值来执行功率密集型操作。

    Detection of nucleic acid differences using combined endonuclease cleavage and ligation reactions
    9.
    发明授权
    Detection of nucleic acid differences using combined endonuclease cleavage and ligation reactions 有权
    使用组合内切核酸酶切割和连接反应检测核酸差异

    公开(公告)号:US07960159B2

    公开(公告)日:2011-06-14

    申请号:US12874255

    申请日:2010-09-02

    IPC分类号: C12N9/22

    摘要: The present invention is a method for detecting DNA sequence differences including single nucleotide mutations or polymorphisms, one or more nucleotide insertions, and one or more nucleotide deletions. Labeled heteroduplex PCR fragments containing base mismatches are prepared. Endonuclease cleaves the heteroduplex PCR fragments both at the position containing the variation (one or more mismatched bases) and to a lesser extent, at non-variant (perfectly matched) positions. Ligation of the cleavage products with a DNA ligase corrects non-variant cleavages and thus substantially reduces background. This is then followed by a detection step in which the reaction products are detected, and the position of the sequence variations are determined.

    摘要翻译: 本发明是检测DNA序列差异的方法,包括单核苷酸突变或多态性,一个或多个核苷酸插入和一个或多个核苷酸缺失。 制备含有碱基错配的标记的异源双链PCR片段。 核酸内切酶在含有变异(一个或多个错配碱基)的位置和较少程度上在非变体(完全匹配)位置处切割异源双链PCR片段。 用DNA连接酶连接切割产物校正非变体切割,从而大大减少背景。 然后进行检测步骤,其中检测反应产物,并确定序列变异的位置。

    Non-Volatile Memory And Method With Post-Write Read And Adaptive Re-Write To Manage Errors
    10.
    发明申请
    Non-Volatile Memory And Method With Post-Write Read And Adaptive Re-Write To Manage Errors 有权
    非易失性存储器和具有后写入读取和自适应重写的方法来管理错误

    公开(公告)号:US20110099460A1

    公开(公告)日:2011-04-28

    申请号:US12642728

    申请日:2009-12-18

    摘要: Data errors in non-volatile memory inevitably increase with usage and with higher density of bits stored per cell. The memory is configured to have a first portion operating with less error but of lower density storage, and a second portion operating with a higher density but less robust storage. Input data is written and staged in the first portion before being copied to the second portion. An error management provides checking the quality of the copied data for excessive error bits. The copying and checking are repeated on a different location in the second portion until either a predetermined quality is satisfied or the number or repeats exceeds a predetermined limit. The error management is not started when a memory is new with little or no errors, but started after the memory has aged to a predetermined amount as determined by the number of erase/program cycling its has experienced.

    摘要翻译: 非易失性存储器中的数据错误不可避免地随着使用而增加,并且每个单元存储更高密度的位。 存储器被配置为具有以较小误差但是较低密度存储器操作的第一部分,以及以较高密度但较不牢固的存储器操作的第二部分。 在将第一部分复制到第二部分之前,输入数据被写入并分级。 错误管理提供检查复制数据的质量是否存在过多的错误位。 在第二部分中的不同位置重复复印和检查,直到满足预定质量或者数量或重复超过预定限度。 当存储器是新的,几乎没有或没有错误时,错误管理不开始,但是在内存已经老化到由其经历的擦除/程序循环的数量确定的预定量之后开始。