公开(公告)号：US09748203B2

公开(公告)日：2017-08-29

申请号：US13327609

申请日：2011-12-15

Applicant: DeokKyung Yang ,  In Sang Yoon ,  SeongHun Mun ,  KyungHwan Kim

Inventor： DeokKyung Yang ,  In Sang Yoon ,  SeongHun Mun ,  KyungHwan Kim

IPC: H01L23/48 ,  H01L21/76 ,  H01L25/065 ,  H01L23/00 ,  H01L23/31

CPC classification number: H01L25/0657 ,  H01L23/3128 ,  H01L24/13 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16245 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06596 ,  H01L2924/15311 ,  H01L2924/18161 ,  H01L2924/19107 ,  H01L2924/00012 ,  H01L2924/00

Abstract: A method of manufacture of an integrated circuit packaging system including: providing a package carrier; mounting an integrated circuit to the package carrier; mounting a circuit interposer above the integrated circuit; mounting a mounting integrated circuit above the circuit interposer; forming a conductive pillar to the circuit interposer adjacent to the mounting integrated circuit; connecting the circuit interposer to the package carrier; and forming an encapsulation on the package carrier.

公开(公告)号：US09142530B2

公开(公告)日：2015-09-22

申请号：US14214765

申请日：2014-03-15

Applicant: Byung Tai Do ,  Arnel Senosa Trasporto ,  Sung Soo Kim ,  Asri Yusof ,  In Sang Yoon

Inventor： Byung Tai Do ,  Arnel Senosa Trasporto ,  Sung Soo Kim ,  Asri Yusof ,  In Sang Yoon

IPC: H01L23/29 ,  H01L23/00 ,  H01L23/498 ,  H01L21/48 ,  H01L21/56 ,  H01L21/683 ,  H01L25/065 ,  H01L23/31

CPC classification number: H01L24/81 ,  H01L21/4846 ,  H01L21/486 ,  H01L21/561 ,  H01L21/683 ,  H01L21/6835 ,  H01L23/3121 ,  H01L23/3128 ,  H01L23/3142 ,  H01L23/49816 ,  H01L23/49827 ,  H01L24/13 ,  H01L24/16 ,  H01L24/27 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/83 ,  H01L24/85 ,  H01L24/92 ,  H01L24/97 ,  H01L25/0657 ,  H01L2221/68345 ,  H01L2221/68381 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/2732 ,  H01L2224/27334 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/81411 ,  H01L2224/81444 ,  H01L2224/81447 ,  H01L2224/81455 ,  H01L2224/81464 ,  H01L2224/8385 ,  H01L2224/85444 ,  H01L2224/9202 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06558 ,  H01L2924/00014 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/3511 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/014 ,  H01L2224/83 ,  H01L2224/85 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A system and method for manufacturing an integrated circuit packaging system includes: forming a base substrate including: providing a sacrificial carrier: mounting a metallic sheet on the sacrificial carrier, applying a top trace to the metallic sheet, forming a conductive stud on the top trace, forming a base encapsulation over the metallic sheet, the top trace, and the conductive stud, the top trace exposed from a top surface of the base encapsulation, and removing the sacrificial carrier and the metallic sheet; mounting an integrated circuit device on the base substrate; and encapsulating the integrated circuit device and the base substrate with a top encapsulation.

Abstract translation: 一种用于制造集成电路封装系统的系统和方法，包括：形成基底基底，包括：提供牺牲载体：将金属片安装在牺牲载体上，向金属片施加顶部迹线，在顶部迹线上形成导电柱 在所述金属片，所述顶部迹线和所述导电柱上形成基底封装，所述顶部迹线从所述基底封装的顶部表面露出，以及移除所述牺牲载体和所述金属片; 在基底基板上安装集成电路器件; 并用顶部封装封装集成电路器件和基底衬底。

公开(公告)号：US08497575B2

公开(公告)日：2013-07-30

申请号：US12710359

申请日：2010-02-22

Applicant: In Sang Yoon ,  JoHyun Bae ,  DeokKyung Yang

Inventor： In Sang Yoon ,  JoHyun Bae ,  DeokKyung Yang

IPC: H01L21/00 ,  H01L21/44 ,  H01L23/02 ,  H01L23/06 ,  H01L23/48 ,  H01L23/28

CPC classification number: H01L23/3128 ,  H01L21/561 ,  H01L23/544 ,  H01L2223/54426 ,  H01L2223/54486 ,  H01L2224/16 ,  H01L2224/73204 ,  H01L2224/97 ,  H01L2924/15311 ,  H01L2224/81

Abstract: A method of manufacture of a semiconductor packaging system includes: providing a base substrate having edges; mounting an electrical interconnect on the base substrate; and applying an encapsulant having a reference marker and an opening over the electrical interconnect, the reference marker around the electrical interconnect based on physical locations of the edges.

Abstract translation: 一种制造半导体封装系统的方法包括：提供具有边缘的基底基板; 在所述基底基板上安装电互连; 以及基于所述边缘的物理位置施加具有参考标记和所述电互连上的开口的密封剂，所述参考标记围绕所述电互连。

公开(公告)号：US08409917B2

公开(公告)日：2013-04-02

申请号：US13053719

申请日：2011-03-22

Applicant: In Sang Yoon ,  HeeJo Chi ,  HanGil Shin

Inventor： In Sang Yoon ,  HeeJo Chi ,  HanGil Shin

IPC: H01L21/00

CPC classification number: H01L23/49816 ,  H01L21/563 ,  H01L23/13 ,  H01L23/3128 ,  H01L23/49833 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/4824 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2225/06558 ,  H01L2225/06568 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/0401 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A method of manufacturing of an integrated circuit packaging system includes: providing a base substrate; mounting a first die over the base substrate; mounting a second die over the first die; attaching an interposer substrate over the first die with an attachment adhesive therebetween, the interposer substrate having a central cavity and the second die within the central cavity; attaching a lateral interconnect to a second active side away from the first die of the second die and to the interposer substrate; and encapsulating the first die and the second die.

Abstract translation: 一种集成电路封装系统的制造方法，包括：提供基底; 将第一模具安装在基底基板上; 将第二模具安装在所述第一模具上; 将插入器基板与第一裸片之间的附接粘合剂附接在其上，所述插入器基板具有中心空腔，并且所述第二模具位于所述中心空腔内; 将横向互连件连接到远离所述第二管芯的所述第一管芯的第二有源侧并且连接到所述插入器衬底; 并封装第一模具和第二模具。

公开(公告)号：US08367465B2

公开(公告)日：2013-02-05

申请号：US11276942

申请日：2006-03-17

Applicant: DongSam Park ,  Choong Bin Yim ,  In Sang Yoon

Inventor： DongSam Park ,  Choong Bin Yim ,  In Sang Yoon

IPC: H01L21/00

CPC classification number: H01L25/105 ,  H01L24/73 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06572 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/3511 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

Abstract: A integrated circuit package on package system is provided including providing a base substrate having a base stackable connection, attaching a base integrated circuit on the base substrate, forming a stackable package including the base integrated circuit encapsulated with the base stackable connection partially exposed, and attaching a bottom package on the stackable package.

Abstract translation: 提供了一种集成电路封装在封装系统上，包括提供具有基本可堆叠连接的基底基板，将基底集成电路连接在基底基板上，形成可堆叠的封装，其包括基部集成电路，该基本集成电路封装有部分露出的基部可堆叠连接， 可堆叠包装上的底部包装。

公开(公告)号：US20120326331A1

公开(公告)日：2012-12-27

申请号：US13166802

申请日：2011-06-22

Applicant: Byung Joon Han ,  In Sang Yoon ,  JoHyun Bae

Inventor： Byung Joon Han ,  In Sang Yoon ,  JoHyun Bae

IPC: H01L23/522 ,  H01L21/50

CPC classification number: H01L25/105 ,  H01L23/3128 ,  H01L24/73 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06568 ,  H01L2225/1023 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/19105 ,  H01L2924/3511 ,  H01L2924/00012 ,  H01L2924/00

Abstract: A method of manufacture of an integrated circuit packaging system includes: providing a first substrate; attaching vertical interconnects along a periphery of the first substrate; mounting an integrated circuit over the first substrate, the integrated circuit surrounded by the vertical interconnects; and mounting a second substrate directly on the vertical interconnects and the integrated circuit.

Abstract translation: 一种集成电路封装系统的制造方法，包括：提供第一基板; 沿着所述第一基板的周边附接垂直互连; 在第一基板上安装集成电路，由垂直互连围绕的集成电路; 以及将第二衬底直接安装在垂直互连件和集成电路上。

公开(公告)号：US20120086115A1

公开(公告)日：2012-04-12

申请号：US13324380

申请日：2011-12-13

Applicant: A Leam Choi ,  Kenny Lee ,  In Sang Yoon ,  HanGil Shin

Inventor： A Leam Choi ,  Kenny Lee ,  In Sang Yoon ,  HanGil Shin

IPC: H01L23/52 ,  H01L21/56

CPC classification number: H01L23/49833 ,  H01L23/3128 ,  H01L23/49816 ,  H01L24/48 ,  H01L24/73 ,  H01L25/03 ,  H01L25/105 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2225/1023 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2225/1088 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/19107 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/0401 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A method of manufacture of an integrated circuit packaging system includes: providing an integrated circuit; mounting a routing structure having a functional side above the integrated circuit; mounting a vertical interconnect to the functional side of the routing structure and the vertical interconnect extending vertically away from the routing structure; forming an encapsulation covering the integrated circuit, the routing structure, and sides of the vertical interconnect above the routing structure, and leaves a surface of the routing structure exposed from the encapsulation, and a portion of the vertical interconnect exposed from the encapsulation above the surface of the routing structure; mounting a first-external-package-component to the routing structure; and forming a first-external-package-encapsulation covering the first-external-package-component.

Abstract translation: 一种集成电路封装系统的制造方法，包括：提供集成电路; 安装具有在集成电路上方的功能侧的布线结构; 将垂直互连件安装到所述路由结构的功能侧，并且所述垂直互连件垂直延伸远离所述路由结构; 在路由结构之上形成覆盖集成电路，路由结构和垂直互连的侧面的封装，并且使从路由结构暴露的路由结构的表面离开，并且垂直互连的一部分从表面上方的封装暴露出来 的路由结构; 将第一外部包装组件安装到路由结构; 以及形成覆盖所述第一外部封装部件的第一外部封装封装。

公开(公告)号：US20100301469A1

公开(公告)日：2010-12-02

申请号：US12473253

申请日：2009-05-27

Applicant: A Leam Choi ,  Kenny Lee ,  In Sang Yoon ,  HanGil Shin

Inventor： A Leam Choi ,  Kenny Lee ,  In Sang Yoon ,  HanGil Shin

IPC: H01L23/52 ,  H01L21/56

CPC classification number: H01L23/49833 ,  H01L23/3128 ,  H01L23/49816 ,  H01L24/48 ,  H01L24/73 ,  H01L25/03 ,  H01L25/105 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2225/1023 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2225/1088 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/19107 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/0401 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A method of manufacture of an integrated circuit packaging system includes: providing an integrated circuit; mounting a routing structure having a functional side above the integrated circuit; mounting a vertical interconnect to the functional side of the routing structure and the vertical interconnect extending vertically away from the routing structure; and forming an encapsulation that encapsulates the integrated circuit, the routing structure, and sides of the vertical interconnect above the routing structure, and leaves a surface of the routing structure exposed from the encapsulation, and a portion of the vertical interconnect exposed from the encapsulation above the surface of the routing structure.

Abstract translation: 一种集成电路封装系统的制造方法，包括：提供集成电路; 安装具有在所述集成电路上方的功能侧的布线结构; 将垂直互连件安装到所述路由结构的功能侧，并且所述垂直互连件垂直延伸远离所述路由结构; 并且形成封装集成电路，路由结构以及路由结构之上的垂直互连的侧面的封装，并且离开从封装露出的布线结构的表面，以及从上述封装暴露的一部分垂直互连 路由结构的表面。

公开(公告)号：US07800212B2

公开(公告)日：2010-09-21

申请号：US11965641

申请日：2007-12-27

Applicant: In Sang Yoon ,  JoHyun Bae ,  HanGil Shin

Inventor： In Sang Yoon ,  JoHyun Bae ,  HanGil Shin

IPC: H01L23/02

CPC classification number: H01L23/3128 ,  H01L24/73 ,  H01L25/03 ,  H01L25/105 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45139 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01L2225/06568 ,  H01L2225/1023 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2225/107 ,  H01L2225/1088 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/19107 ,  H01L2924/00 ,  H01L2924/00012

Abstract: A mountable integrated circuit package system includes: forming a base integrated circuit package system includes: providing a first substrate, and forming a package encapsulation having a cavity over the first substrate with the first substrate partially exposed within the cavity; and mounting an interposer including a central aperture over the package encapsulation and the first substrate with the central aperture over the cavity.

Abstract translation: 一种可安装的集成电路封装系统，包括：形成基底集成电路封装系统，包括：提供第一衬底，以及形成封装封装，所述封装封装在所述第一衬底上具有空腔，所述第一衬底部分地暴露在所述空腔内; 以及将包括中心孔的插入件安装在封装封装件上，并且第一衬底具有位于空腔上的中心孔。

公开(公告)号：US20100123233A1

公开(公告)日：2010-05-20

申请号：US12273541

申请日：2008-11-18

Applicant: In Sang Yoon ,  SeongMin Lee ,  Sungmin Song

Inventor： In Sang Yoon ,  SeongMin Lee ,  Sungmin Song

IPC: H01L21/50 ,  H01L23/48

CPC classification number: H05K1/144 ,  H01L23/3128 ,  H01L24/73 ,  H01L25/105 ,  H01L2224/04042 ,  H01L2224/16 ,  H01L2224/16235 ,  H01L2224/32145 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/06562 ,  H01L2225/06568 ,  H01L2225/06572 ,  H01L2225/06586 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15321 ,  H01L2924/15331 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/19105 ,  H05K1/141 ,  H05K3/3436 ,  H05K2201/09709 ,  H05K2201/09972 ,  H05K2201/10734 ,  H05K2203/049 ,  H01L2924/00012 ,  H01L2224/32225 ,  H01L2924/00 ,  H01L2224/0401

Abstract: A method of manufacturing an integrated circuit package system including: providing a circuit board having an interconnect thereon; mounting a first device offset on the circuit board; and applying a first encapsulant of a first thickness over the first device, the first encapsulant of a second thickness thinner than the first thickness over the remainder of the circuit board with the interconnect exposed, or a second encapsulant of a third thickness over a second device on an opposite surface of the circuit board and differently offset from the first device.

Abstract translation: 一种制造集成电路封装系统的方法，包括：提供其上具有互连的电路板; 在电路板上安装第一设备偏移; 以及在所述第一装置上施加第一厚度的第一密封剂，所述第一密封剂的第二厚度比所述电路板的剩余部分薄于所述第一厚度，所述第一厚度在所述第一装置上暴露，或者在第二装置上具有第三厚度的第二密封剂 在电路板的相对表面上，并且与第一器件不同地偏移。