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公开(公告)号:US11121699B2
公开(公告)日:2021-09-14
申请号:US16279902
申请日:2019-02-19
Applicant: QUALCOMM Incorporated
Inventor: Kai Liu , Rui Tang , Changhan Hobie Yun , Mario Francisco Velez , Jonghae Kim
Abstract: Aspects of the disclosure are directed to a bandpass filter including a first, second, third and fourth resonators, wherein the second and third resonators are in parallel, wherein the first resonator includes a first and second terminals, wherein the second resonator includes a second resonator top terminal and a second resonator bottom terminal, wherein the third resonator includes a third resonator top terminal and a third resonator bottom terminal, wherein the fourth resonator includes a third terminal and a fourth terminal; wherein the first terminal is coupled to the second resonator top terminal, wherein the second terminal is coupled to the third resonator top terminal, wherein the third terminal is coupled to the third resonator bottom terminal, wherein the fourth terminal is coupled to the second resonator bottom terminal; a first inductor coupled to the first and third terminals; and a second inductor coupled to the second and fourth terminals.
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公开(公告)号:US10553671B2
公开(公告)日:2020-02-04
申请号:US15178900
申请日:2016-06-10
Applicant: QUALCOMM Incorporated
Inventor: Chengjie Zuo , Jonghae Kim , Daeik Daniel Kim , Changhan Hobie Yun , Mario Francisco Velez
IPC: H01L29/00 , H01L49/02 , H01L21/48 , H01F17/00 , H01L23/522 , H01L23/498 , H01L23/48 , H01L23/64 , H01F27/28 , H01L23/00
Abstract: Base pads are spaced by a pitch on a support surface. Conducting members, optionally Cu or other metal pillars, extend up from the base pads to top pads. A top pad interconnector connects the top pads in a configuration establishing an inductor current path between the base pads.
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公开(公告)号:US10319694B2
公开(公告)日:2019-06-11
申请号:US15233902
申请日:2016-08-10
Applicant: QUALCOMM Incorporated
Inventor: Daniel Daeik Kim , Jie Fu , Manuel Aldrete , Jonghae Kim , Changhan Hobie Yun , David Francis Berdy , Chengjie Zuo , Mario Francisco Velez
IPC: H01L23/00 , H01L23/31 , H01L23/367 , H01L21/56 , H01L23/48 , H01L23/498
Abstract: A semiconductor device according to some examples of the disclosure may include a package substrate, a semiconductor die coupled to one side of the package substrate with a first set of contacts on an active side of the semiconductor die and coupled to a plurality of solder prints with a second set of contacts on a back side of the semiconductor die. The semiconductor die may include a plurality of vias connecting the first set of contacts to the second set of contacts and configured to allow heat to be transferred from the active side of the die to the plurality of solder prints for a shorter heat dissipation path.
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公开(公告)号:US10154591B2
公开(公告)日:2018-12-11
申请号:US15896959
申请日:2018-02-14
Applicant: QUALCOMM Incorporated
Inventor: Chengjie Zuo , David Francis Berdy , Daeik Daniel Kim , Changhan Hobie Yun , Mario Francisco Velez , Jonghae Kim
IPC: H05K5/00 , H05K1/18 , H03H7/01 , H05K3/10 , H05K3/30 , H05K3/40 , H05K1/02 , H05K1/14 , H01L21/56 , H01L23/12 , H01L23/15 , H01L23/28 , H01L23/538 , H01L23/552
Abstract: Passive device assembly for accurate ground plane control is disclosed. A passive device assembly includes a device substrate conductively coupled to a ground plane separation control substrate. A passive device disposed on a lower surface of the device substrate is separated from an embedded ground plane mounted on a lower surface of the ground plane separation control substrate by a separation distance. The separation distance is accurately controlled to minimize undesirable interference that may occur to the passive device. The separation distance is provided inside the passive device assembly. Conductive mounting pads are disposed on the lower surface of the ground plane separation control substrate to support accurate alignment of the passive device assembly on a circuit board. By providing sufficient separation distance inside the passive device assembly, the passive device assembly can be precisely mounted onto any circuit board regardless of specific design and layout of the circuit board.
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公开(公告)号:US10141353B2
公开(公告)日:2018-11-27
申请号:US15161152
申请日:2016-05-20
Applicant: QUALCOMM Incorporated
Inventor: Changhan Hobie Yun , Daeik Daniel Kim , Jonghae Kim , Mario Francisco Velez , Chengjie Zuo , David Francis Berdy
Abstract: The present disclosure provides integrated circuit apparatuses and methods for manufacturing integrated circuit apparatuses. An integrated circuit apparatus may include a first insulator, the first insulator being substantially planar and having a first top surface and a first bottom surface opposite the first top surface, a first conductor disposed on the first insulator, a second insulator, the second insulator being substantially planar and having a second top surface and a second bottom surface opposite the second top surface, a second conductor disposed on the second insulator, and a dielectric layer disposed between the first bottom conductor of the first insulator and the second top conductor of the second insulator.
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公开(公告)号:US10103703B2
公开(公告)日:2018-10-16
申请号:US15161138
申请日:2016-05-20
Applicant: QUALCOMM Incorporated
Inventor: Changhan Hobie Yun , David Francis Berdy , Chengjie Zuo , Daeik Daniel Kim , Jonghae Kim , Mario Francisco Velez , Niranjan Sunil Mudakatte , Robert Paul Mikulka
IPC: H03H7/01 , H01F5/00 , H01F41/04 , H01P1/203 , H03H7/09 , H05K1/18 , H03H1/00 , H05K1/02 , H05K1/03 , H05K1/11 , H05K1/16 , H05K3/00 , H05K3/18 , H05K3/40 , H01P1/213 , H01P5/12 , H03H7/46
Abstract: The present disclosure provides circuits and methods for fabricating circuits. A circuit may include an insulator having a first surface, a second surface, a periphery, a first subset of circuit elements disposed on the first surface, a second subset of circuit elements disposed on the second surface, and at least one conductive sidewall disposed on the periphery, wherein the conductive sidewall electrically couples the first subset of circuit elements to the second subset of circuit elements.
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公开(公告)号:US20180145062A1
公开(公告)日:2018-05-24
申请号:US15861140
申请日:2018-01-03
Applicant: QUALCOMM Incorporated
Inventor: Je-Hsiung Jeffrey Lan , Niranjan Sunil Mudakatte , Changhan Hobie Yun , Daeik Daniel Kim , Chengjie Zuo , David Francis Berdy , Mario Francisco Velez , Jonghae Kim
IPC: H01L27/01 , H01L49/02 , H01L23/522 , H01L23/15
CPC classification number: H01L27/01 , H01G2/02 , H01G4/005 , H01L21/4846 , H01L23/15 , H01L23/49816 , H01L23/49822 , H01L23/5223 , H01L23/5227 , H01L28/10 , H01L28/75 , H01L2224/11
Abstract: A device includes a glass substrate and a capacitor. The capacitor includes a first metal coupled to a first electrode, a dielectric structure, and a via structure comprising a second electrode of the capacitor. The first metal structure is separated from the via structure by the dielectric structure.
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78.
公开(公告)号:US09966426B2
公开(公告)日:2018-05-08
申请号:US14853967
申请日:2015-09-14
Applicant: QUALCOMM Incorporated
Inventor: Niranjan Sunil Mudakatte , Daeik Daniel Kim , David Francis Berdy , Changhan Hobie Yun , Je-Hsiung Jeffrey Lan , Chengjie Zuo , Mario Francisco Velez , Robert Paul Mikulka , Jonghae Kim
IPC: H01L23/057 , H01L23/48 , H01L23/495 , H01L49/02 , H01L23/522 , H01L27/08 , H01L23/00
CPC classification number: H01L28/60 , H01L23/5223 , H01L24/13 , H01L27/0805 , H01L28/87 , H01L28/91 , H01L2224/0401 , H01L2224/04042 , H01L2224/13109 , H01L2224/94 , H01L2924/10329 , H01L2924/1033 , H01L2924/10337 , H01L2924/1305 , H01L2924/1306 , H01L2924/14 , H01L2224/03
Abstract: An augmented capacitor structure includes a substrate and a first capacitor plate of a first conductive layer on the substrate. The augmented capacitor structure also includes an insulator layer on a surface of the first capacitor plate facing away from the substrate and a second capacitor plate. The second capacitor plate includes a second conductive layer on the insulator layer, supported by the first capacitor plate as a first capacitor. A second capacitor electrically is coupled in series with the first capacitor. The first capacitor plate is shared by the first capacitor and the second capacitor as a shared first capacitor plate. An extended first capacitor plate includes a first dummy portion of a third conductive layer and a first dummy via bar extending along the surface of the shared first capacitor plate. The first dummy portion extends along and is supported by the first dummy via bar.
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公开(公告)号:US20180062617A1
公开(公告)日:2018-03-01
申请号:US15247803
申请日:2016-08-25
Applicant: QUALCOMM Incorporated
Inventor: Changhan Hobie Yun , Je-Hsiung Lan , Chengjie Zuo , David Berdy , Jonghae Kim , Mario Velez , Niranjan Sunil Mudakatte , Shiqun Gu
IPC: H03H9/205 , H01L41/332 , H03H9/54
CPC classification number: H03H9/205 , H01L41/332 , H03H3/04 , H03H9/173 , H03H9/54 , H03H2003/021 , H03H2003/0435 , H03H2003/0442 , H03H2003/0471
Abstract: A single-die multi-FBAR (film bulk acoustic resonator) device includes multiple FBARs having different resonant frequencies formed over a single substrate. The FBARs include piezoelectric layers having different thicknesses but with upper electrodes formed at a same height over the substrate, lower electrodes at different heights over the substrate, and different sized air gaps separating the lower electrodes from the substrate.
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公开(公告)号:US09906318B2
公开(公告)日:2018-02-27
申请号:US14682023
申请日:2015-04-08
Applicant: QUALCOMM Incorporated
Inventor: Chengjie Zuo , Daeik Daniel Kim , David Francis Berdy , Changhan Hobie Yun , Je-Hsiung Jeffrey Lan , Robert Paul Mikulka , Mario Francisco Velez , Jonghae Kim , Matthew Michael Nowak , Ryan Scott C. Spring , Xiangdong Zhang
CPC classification number: H04J1/08 , H03H7/465 , H03H2240/00 , H03H2250/00 , H04B1/0057 , H04B1/006 , H04B1/0064
Abstract: An apparatus is disclosed that includes a frequency multiplexer circuit coupled to an input node and configured to receive an input signal via the input node. The frequency multiplexer circuit comprises a first filter circuit, a second filter circuit, and a third filter circuit. The apparatus also includes a switching circuit that is configurable to couple at least two of a first output of the first filter circuit, a second output of the second filter circuit, or a third output of the third filter circuit to a single output port.
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