公开(公告)号：US08013446B2

公开(公告)日：2011-09-06

申请号：US12190277

申请日：2008-08-12

申请人： Chih-Chao Yang ,  Chao-Kun Hu

发明人： Chih-Chao Yang ,  Chao-Kun Hu

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L23/53238 ,  H01L21/76843 ,  H01L21/76846 ,  H01L21/76849 ,  H01L23/53223 ,  H01L23/53266 ,  H01L23/5329 ,  H01L2924/0002 ,  H01L2924/00

摘要： An interconnect structure is provided that has enhanced electromigration reliability without degrading circuit short yield, and improved technology extendibility. The inventive interconnect structure includes a dielectric material having a dielectric constant of about 3.0 or less. The dielectric material has at least one conductive material embedded therein. A nitrogen-containing noble metal cap is located predominately (i.e., essentially) on an upper surface of the at least one conductive region. The nitrogen-containing noble metal cap does not extend onto an upper surface of the dielectric material. In some embodiments, the nitrogen-containing noble metal cap is self-aligned to the embedded conductive material, while in other embodiments some portion of the nitrogen-containing noble metal cap extends onto an upper surface of a diffusion barrier that separates the at least one conductive material from the dielectric material. A method of fabricating such an interconnect structure utilizing a low temperature (about 200° C. or less) chemical deposition process is also provided.

摘要翻译： 提供了一种互连结构，其具有增强的电迁移可靠性，而不降低电路短产量，并且提高了技术可扩展性。 本发明的互连结构包括具有约3.0或更小的介电常数的电介质材料。 电介质材料具有嵌入其中的至少一种导电材料。 主要地（即基本上）位于至少一个导电区域的上表面上的含氮贵金属盖帽。 含氮贵金属盖不延伸到电介质材料的上表面上。 在一些实施方案中，含氮贵金属帽与嵌入的导电材料自对准，而在其它实施方案中，含氮贵金属帽的某些部分延伸到扩散阻挡层的上表面上，所述扩散阻挡层的上表面将至少一个 导电材料。 还提供了利用低温（约200℃或更低）化学沉积工艺制造这种互连结构的方法。

公开(公告)号：US08009453B2

公开(公告)日：2011-08-30

申请号：US12136089

申请日：2008-06-10

申请人： Michael C. Gaidis ,  Lawrence A. Clevenger ,  Timothy J. Dalton ,  John K. DeBrosse ,  Louis L. C. Hsu ,  Carl Radens ,  Keith Kwong-Hon Wong ,  Chih-Chao Yang

发明人： Michael C. Gaidis ,  Lawrence A. Clevenger ,  Timothy J. Dalton ,  John K. DeBrosse ,  Louis L. C. Hsu ,  Carl Radens ,  Keith Kwong-Hon Wong ,  Chih-Chao Yang

IPC分类号： G11C19/08 ,  G11C19/38

CPC分类号： G11C19/0841 ,  B82Y10/00 ,  G11C5/02 ,  G11C11/161 ,  G11C11/1675 ,  Y10T29/53165

摘要： A magnetic domain wall memory apparatus with write/read capability includes a plurality of coplanar shift register structures each comprising an elongated track formed from a ferromagnetic material having a plurality of magnetic domains therein, the shift register structures further having a plurality of discontinuities therein to facilitate domain wall location; a magnetic read element associated with each of the shift register structures; and a magnetic write element associated with each of the shift register structures, the magnetic write element further comprising a write wire having a constriction therein, the constriction located at a point corresponding to the location of the plurality of discontinuities in the associated shift register structure.

摘要翻译： 具有写入/读取功能的磁畴壁存储装置包括多个共面移位寄存器结构，每个包括由其中具有多个磁畴的铁磁材料形成的细长轨道，移位寄存器结构还具有多个不连续性，以便于 域墙位置; 与每个移位寄存器结构相关联的磁读取元件; 以及与所述移位寄存器结构中的每一个相关联的磁写元件，所述磁写入元件还包括其中具有收缩部的写入线，所述收缩部位于与相关联的移位寄存器结构中的所述多个不连续点的位置对应的点处。

公开(公告)号：US08000592B2

公开(公告)日：2011-08-16

申请号：US12762073

申请日：2010-04-16

申请人： Chen Yi Huang ,  Te Sheng Tseng ,  Chao Yang Chen ,  Wen Hung Hsu

发明人： Chen Yi Huang ,  Te Sheng Tseng ,  Chao Yang Chen ,  Wen Hung Hsu

IPC分类号： G03B3/10 ,  G03B13/00

CPC分类号： G03B5/00 ,  G02B7/08 ,  G03B3/10 ,  G03B2205/0023 ,  H02P6/28

摘要： A driving circuit for a photographing module includes a load comprising three coils and four signal input ends; a power source configured to drive the coils and capable of providing an intermediate level between a supply voltage level and a ground level; and a set of electronic switch elements. The driving circuit controls the magnitudes and directions of the electric currents flowing through the coils by switching the set of electronic switch elements, thereby enabling the photographing module to perform auto-focusing and compensate for an angle of inclination.

摘要翻译： 用于拍摄模块的驱动电路包括包括三个线圈和四个信号输入端的负载; 电源，被配置为驱动线圈并且能够在电源电压电平和地电平之间提供中间电平; 和一组电子开关元件。 驱动电路通过切换一组电子开关元件来控制流过线圈的电流的大小和方向，从而使拍摄模块能够执行自动对焦并补偿倾斜角度。

公开(公告)号：US07984409B2

公开(公告)日：2011-07-19

申请号：US11875193

申请日：2007-10-19

申请人： Louis Lu-Chen Hsu ,  Jack Allan Mandelman ,  William Robert Tonti ,  Chih-Chao Yang

发明人： Louis Lu-Chen Hsu ,  Jack Allan Mandelman ,  William Robert Tonti ,  Chih-Chao Yang

IPC分类号： G06F17/50 ,  H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L21/76834 ,  H01L21/76849 ,  H01L21/76883 ,  H01L21/76885

摘要： Design structure embodied in a machine readable medium for designing, manufacturing, or testing a design. The design structure comprises an insulating layer of a dielectric material, an opening having sidewalls extending from a top surface of the insulating layer toward a bottom surface of the insulating layer, and a conductive feature disposed in the opening. The design structure includes a top capping layer disposed on at least a top surface of the conductive feature and a conductive liner layer disposed between the insulating layer and the conductive feature along at least the sidewalls of the opening. The conductive liner layer of the design structure has sidewall portions that project above the top surface of the insulating layer adjacent to the sidewalls of the opening.

摘要翻译： 用于设计，制造或测试设计的机器可读介质中体现的设计结构。 该设计结构包括介电材料的绝缘层，具有从绝缘层的顶表面朝向绝缘层的底表面延伸的侧壁的开口以及设置在该开口中的导电特征。 该设计结构包括设置在导电特征的至少顶表面上的顶盖层和至少沿开口的侧壁设置在绝缘层和导电特征之间的导电衬垫层。 该设计结构的导电衬里层具有侧壁部分，该侧壁部分突出在邻近开口侧壁的绝缘层顶表面上方。

公开(公告)号：US07973409B2

公开(公告)日：2011-07-05

申请号：US11625576

申请日：2007-01-22

申请人： Chih-Chao Yang ,  Thomas M. Shaw ,  Keith Kwong Hon Wong ,  Haining S. Yang

发明人： Chih-Chao Yang ,  Thomas M. Shaw ,  Keith Kwong Hon Wong ,  Haining S. Yang

IPC分类号： H01L21/00

CPC分类号： H01L21/76841 ,  H01L21/7682 ,  H01L21/76831 ,  H01L23/481 ,  H01L23/5222 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53266 ,  H01L23/53271 ,  H01L23/5329 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

摘要： The present invention provides an interconnect structure (of the single or dual damascene type) and a method of forming the same, in which a dense (i.e., non-porous) dielectric spacer is present on the sidewalls of a dielectric material. More specifically, the inventive structure includes a dielectric material having a conductive material embedded within at least one opening in the dielectric material, wherein the conductive material is laterally spaced apart from the dielectric material by a diffusion barrier, a dense dielectric spacer and, optionally, an air gap. The presence of the dense dielectric spacer results in a hybrid interconnect structure that has improved reliability and performance as compared with existing prior art interconnect structures which do not include such dense dielectric spacers. Moreover, the inventive hybrid interconnect structure provides for better process control which leads to the potential for high volume manufacturing.

摘要翻译： 本发明提供了一种互连结构（单镶嵌型或双镶嵌型）及其形成方法，其中在电介质材料的侧壁上存在致密的（即非多孔的）电介质间隔物。 更具体地，本发明的结构包括介电材料，其具有嵌入介电材料中的至少一个开口中的导电材料，其中导电材料通过扩散阻挡层，致密电介质间隔物和任选地， 气隙。 与现有技术的不包括这种致密电介质间隔物的互连结构相比，密集电介质间隔物的存在导致混合互连结构具有改进的可靠性和性能。 此外，本发明的混合互连结构提供了更好的过程控制，这导致了大批量制造的潜力。

公开(公告)号：US07964966B2

公开(公告)日：2011-06-21

申请号：US12494564

申请日：2009-06-30

申请人： Chih-Chao Yang ,  Daniel C. Edelstein ,  Theodorus E. Standaert

发明人： Chih-Chao Yang ,  Daniel C. Edelstein ,  Theodorus E. Standaert

IPC分类号： H01L23/48 ,  H01L21/4763 ,  H01L21/44

CPC分类号： H01L21/76808 ,  H01L21/76805 ,  H01L21/76844 ,  H01L21/76846 ,  H01L23/5226 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53266 ,  H01L2924/0002 ,  H01L2924/00

摘要： An interconnect structure including a gouging feature at the bottom of a via opening and a method of forming the same are provided. The method of the present invention does not disrupt the coverage of the deposited trench diffusion barrier in a line opening that is located atop the via opening, and/or does not introduce damages caused by creating a gouging feature at the bottom of the via opening by sputtering into the interconnect dielectric material that includes the via and line openings. Such an interconnect structure is achieved by providing a gouging feature in the bottom of the via opening by first forming the line opening within the interconnect dielectric, followed by forming the via opening and then the gouging feature.

摘要翻译： 提供一种包括通孔开口底部的气刨结构的互连结构及其形成方法。 本发明的方法不会破坏位于通孔开口顶部的线路开口中的沉积的沟槽扩散阻挡层的覆盖和/或不引起由于在通孔开口的底部产生气流特征而造成的损害 溅射到包括通孔和线路开口的互连电介质材料中。 通过首先在互连电介质中形成线路开口，然后形成通孔开口，然后形成沟槽特征，在通孔开口的底部提供气泡特征来实现这种互连结构。

公开(公告)号：US07956466B2

公开(公告)日：2011-06-07

申请号：US12118186

申请日：2008-05-09

申请人： Louis L. Hsu ,  William R. Tonti ,  Chih-Chao Yang

发明人： Louis L. Hsu ,  William R. Tonti ,  Chih-Chao Yang

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L27/10 ,  H01L29/73 ,  H01L29/74

CPC分类号： H01L23/5256 ,  H01L21/76829 ,  H01L21/76838 ,  H01L21/76849 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

摘要： A design structure is provided for interconnect structures containing various capping materials for electrical fuses and other related applications. The structure includes a first interconnect structure having a first interfacial structure and a second interconnect structure adjacent to the first structure. The second interconnect structure has second interfacial structure different from the first interfacial structure.

摘要翻译： 为包含用于电熔丝和其它相关应用的各种封盖材料的互连结构提供了一种设计结构。 该结构包括具有第一界面结构的第一互连结构和与第一结构相邻的第二互连结构。 第二互连结构具有与第一界面结构不同的第二界面结构。

公开(公告)号：US07956463B2

公开(公告)日：2011-06-07

申请号：US12560878

申请日：2009-09-16

申请人： Chih-Chao Yang ,  Daniel C. Edelstein ,  Takeshi Nogami ,  Stephen M. Rossnagel

发明人： Chih-Chao Yang ,  Daniel C. Edelstein ,  Takeshi Nogami ,  Stephen M. Rossnagel

IPC分类号： H01L23/48

CPC分类号： H01L21/76871 ,  H01L21/76846 ,  H01L21/76868 ,  H01L21/76883

摘要： An interconnect structure having reduced electrical resistance and a method of forming such an interconnect structure are provided. The interconnect structure includes a dielectric material including at least one opening therein. The at least one opening is filled with an optional barrier diffusion layer, a grain growth promotion layer, an agglomerated plating seed layer, an optional second plating seed layer a conductive structure. The conductive structure which includes a metal-containing conductive material, typically Cu, has a bamboo microstructure and an average grain size of larger than 0.05 microns. In some embodiments, the conductive structure includes conductive grains that have a (111) crystal orientation.

摘要翻译： 提供具有降低的电阻的互连结构和形成这种互连结构的方法。 互连结构包括其中包括至少一个开口的电介质材料。 至少一个开口填充有可选的阻挡扩散层，晶粒生长促进层，聚集的电镀种子层，任选的第二电镀种子层，导电结构。 包含含金属的导电材料（通常为Cu）的导电结构具有竹结构，平均晶粒尺寸大于0.05微米。 在一些实施例中，导电结构包括具有（111）晶体取向的导电晶粒。

公开(公告)号：US07955952B2

公开(公告)日：2011-06-07

申请号：US12174994

申请日：2008-07-17

申请人： Xiao Hu Liu ,  Chih-Chao Yang ,  Haining Sam Yang

发明人： Xiao Hu Liu ,  Chih-Chao Yang ,  Haining Sam Yang

IPC分类号： H01L29/00 ,  H01L21/00

CPC分类号： H01L23/585 ,  H01L23/3171 ,  H01L2924/0002 ,  H01L2924/00

摘要： An integrated circuit chip and a method of fabricating an integrated circuit chip. The integrated circuit chip includes: a continuous first stress ring proximate to a perimeter of the integrated circuit chip, respective edges of the first stress ring parallel to respective edges of the integrated circuit chip; a continuous second stress ring between the first stress ring and the perimeter of the integrated circuit chip, respective edges the second stress ring parallel to respective edges of the integrated circuit chip, the first and second stress rings having opposite internal stresses; a continuous gap between the first stress ring and the second stress ring; and a set of wiring levels from a first wiring level to a last wiring level on the substrate.

摘要翻译： 集成电路芯片和制造集成电路芯片的方法。 集成电路芯片包括：接近集成电路芯片的周边的连续的第一应力环，第一应力环的相应边缘平行于集成电路芯片的相应边缘; 所述第一应力环与所述集成电路芯片的周边之间的连续的第二应力环，所述第二应力环平行于所述集成电路芯片的相应边缘的相应边缘，所述第一和第二应力环具有相反的内应力; 第一应力环和第二应力环之间的连续间隙; 以及从基板上的第一布线电平到最后布线电平的一组布线电平。

公开(公告)号：US20110100697A1

公开(公告)日：2011-05-05

申请号：US12608377

申请日：2009-10-29

申请人： Chih-Chao Yang ,  Chao-Kun Hu

发明人： Chih-Chao Yang ,  Chao-Kun Hu

IPC分类号： H05K1/11 ,  H01R43/16

CPC分类号： H01L21/76808 ,  H01L21/76805 ,  H01L21/76831 ,  H01L21/76835 ,  H01L2221/1036 ,  Y10T29/49204

摘要： An interconnect structure including a lower interconnect level with a first dielectric layer having a first conductive material embedded therein; a dielectric capping layer located on the first dielectric layer and some portions of the first conductive material; an upper interconnect level including a second dielectric layer having at least one via opening filled with a second conductive material and at least one overlying line opening filled with the second conductive material disposed therein, wherein the at least one via opening is in contact with the first conductive material in the lower interconnect level by a via gouging feature; a dielectric liner on sidewalls of the at least one via opening; and a first diffusion barrier layer on sidewalls and a bottom of both the at least one via opening and the at least one overlying line opening. A method of forming the interconnect structure is also provided.

摘要翻译： 一种互连结构，包括具有嵌入其中的第一导电材料的第一介电层的下部互连电平; 位于所述第一电介质层上的电介质覆盖层和所述第一导电材料的一些部分; 上部互连级别，包括具有填充有第二导电材料的至少一个通孔开口的第二介电层和填充有设置在其中的第二导电材料的至少一个覆盖的线路开口，其中所述至少一个通孔与第一导电材料接触 导电材料在下互连级别通过通孔气刨特征; 在所述至少一个通孔开口的侧壁上的电介质衬垫; 以及在所述至少一个通孔开口和所述至少一个覆盖线开口的侧壁和底部上的第一扩散阻挡层。 还提供了形成互连结构的方法。