公开(公告)号：US20180294236A1

公开(公告)日：2018-10-11

申请号：US16005387

申请日：2018-06-11

申请人： STATS ChipPAC Pte. Ltd.

发明人： Byung Joon Han ,  Il Kwon Shim ,  KyoungHee Park ,  Yaojian Lin ,  KyoWang Koo ,  In Sang Yoon ,  SeungYong Chai ,  SungWon Cho ,  SungSoo Kim ,  Hun Teak Lee ,  DeokKyung Yang

IPC分类号： H01L23/552 ,  H01L23/498 ,  H01L21/683 ,  H01L21/48 ,  H01L23/00 ,  H01L25/16 ,  H01L23/31 ,  H01L21/56

摘要： An integrated circuit packaging system and method of manufacture thereof includes: a substrate with internal circuitry between a substrate top side, a substrate bottom side, and vertical sides; an integrated circuit coupled to the internal circuitry; a molded package body formed directly on the integrated circuit and the substrate top side of the substrate; and a conductive conformal shield structure applied directly on the molded package body, the vertical sides, and to extend below the substrate bottom side coupled to the internal circuitry.

公开(公告)号：US20180294235A1

公开(公告)日：2018-10-11

申请号：US16005348

申请日：2018-06-11

申请人： STATS ChipPAC Pte. Ltd.

发明人： Byung Joon Han ,  Il Kwon Shim ,  KyoungHee Park ,  Yaojian Lin ,  KyoWang Koo ,  In Sang Yoon ,  SeungYong Chai ,  SungWon Cho ,  SungSoo Kim ,  Hun Teak Lee ,  DeokKyung Yang

IPC分类号： H01L23/552 ,  H01L23/498 ,  H01L21/683 ,  H01L21/48 ,  H01L23/00 ,  H01L25/16 ,  H01L23/31 ,  H01L21/56

摘要： An integrated circuit packaging system and method of manufacture thereof includes: a substrate with internal circuitry between a substrate top side, a substrate bottom side, and vertical sides; an integrated circuit coupled to the internal circuitry; a molded package body formed directly on the integrated circuit and the substrate top side of the substrate; and a conductive conformal shield structure applied directly on the molded package body, the vertical sides, and to extend below the substrate bottom side coupled to the internal circuitry.

公开(公告)号：US09997468B2

公开(公告)日：2018-06-12

申请号：US15091049

申请日：2016-04-05

申请人： STATS ChipPAC Pte. Ltd.

发明人： Byung Joon Han ,  Il Kwon Shim ,  KyoungHee Park ,  Yaojian Lin ,  KyoWang Koo ,  In Sang Yoon ,  SeungYong Chai ,  SungWon Cho ,  SungSoo Kim ,  Hun Teak Lee ,  DeokKyung Yang

IPC分类号： H01L23/552 ,  H01L21/48 ,  H01L21/683 ,  H01L23/498 ,  H01L23/31 ,  H01L23/00 ,  H01L25/16 ,  H01L21/56

CPC分类号： H01L23/552 ,  H01L21/486 ,  H01L21/561 ,  H01L21/6835 ,  H01L21/6836 ,  H01L23/3114 ,  H01L23/49805 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/49894 ,  H01L24/13 ,  H01L24/16 ,  H01L24/97 ,  H01L25/16 ,  H01L2221/68327 ,  H01L2224/13111 ,  H01L2224/16227 ,  H01L2224/97 ,  H01L2924/141 ,  H01L2924/143 ,  H01L2924/1434 ,  H01L2924/15311 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/3025 ,  H01L2924/01029 ,  H01L2224/81

摘要： An integrated circuit packaging system and method of manufacture thereof includes: a substrate with internal circuitry between a substrate top side, a substrate bottom side, and vertical sides; an integrated circuit coupled to the internal circuitry; a molded package body formed directly on the integrated circuit and the substrate top side of the substrate; and a conductive conformal shield structure applied directly on the molded package body, the vertical sides, and to extend below the substrate bottom side coupled to the internal circuitry.

公开(公告)号：US09934998B2

公开(公告)日：2018-04-03

申请号：US15379178

申请日：2016-12-14

申请人： STATS ChipPAC Pte. Ltd.

发明人： Byung Joon Han ,  Il Kwon Shim ,  Won Kyoung Choi

IPC分类号： H01L21/00 ,  H01L21/683 ,  H01L23/544 ,  H01L21/78 ,  H01L23/00 ,  H01L23/48

CPC分类号： H01L21/6836 ,  H01L21/6835 ,  H01L21/78 ,  H01L23/481 ,  H01L23/544 ,  H01L24/11 ,  H01L24/13 ,  H01L24/94 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2221/68354 ,  H01L2221/68381 ,  H01L2223/5446 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/0346 ,  H01L2224/0401 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/1132 ,  H01L2224/11334 ,  H01L2224/1146 ,  H01L2224/13023 ,  H01L2224/13025 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/81903 ,  H01L2224/9211 ,  H01L2224/94 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2224/03 ,  H01L2224/11 ,  H01L2924/00012 ,  H01L2924/01082 ,  H01L2924/0105 ,  H01L2924/00 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2224/83851 ,  H01L2224/05552 ,  H01L2224/81805

摘要： A semiconductor device comprises a carrier including an adhesive disposed over the carrier. The semiconductor device further comprises a semiconductor wafer including a plurality of semiconductor die separated by a non-active region. A plurality of bumps is formed over the semiconductor die. The semiconductor wafer is mounted to the carrier with the adhesive disposed around the plurality of bumps. Irradiated energy is applied to the non-active region to form a modified region within the non-active region. The semiconductor wafer is singulated along the modified region to separate the semiconductor die. The semiconductor wafer is singulated along the modified region by applying stress to the semiconductor wafer. The adhesive is removed from around the plurality of bumps after singulating the semiconductor wafer. The semiconductor wafer includes a plurality of semiconductor die comprising through silicon vias. The modified region optionally includes a plurality of vertically stacked modified regions.

公开(公告)号：US20170294406A1

公开(公告)日：2017-10-12

申请号：US15626511

申请日：2017-06-19

申请人： STATS ChipPAC Pte. Ltd.

发明人： Byung Joon Han ,  Il Kwon Shim ,  Yaojian Lin ,  Pandi C. Marimuthu

IPC分类号： H01L23/00 ,  H01L21/78 ,  H01L21/56

CPC分类号： H01L24/96 ,  H01L21/561 ,  H01L21/568 ,  H01L21/78 ,  H01L23/3114 ,  H01L24/19 ,  H01L24/94 ,  H01L24/97 ,  H01L2224/02166 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/05572 ,  H01L2224/12105 ,  H01L2224/13022 ,  H01L2224/94 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/18162 ,  H01L2924/3511 ,  H01L2924/00 ,  H01L2224/05552 ,  H01L2224/03

摘要： A semiconductor device includes a standardized carrier. A semiconductor wafer includes a plurality of semiconductor die and a base semiconductor material. The semiconductor wafer is singulated through a first portion of the base semiconductor material to separate the semiconductor die. The semiconductor die are disposed over the standardized carrier. A size of the standardized carrier is independent from a size of the semiconductor die. An encapsulant is deposited over the standardized carrier and around the semiconductor die. An interconnect structure is formed over the semiconductor die while leaving the encapsulant devoid of the interconnect structure. The semiconductor device is singulated through the encapsulant. Encapsulant remains disposed on a side of the semiconductor die. Alternatively, the semiconductor device is singulated through a second portion of the base semiconductor and through the encapsulant to remove the second portion of the base semiconductor and encapsulant from the side of the semiconductor die.

公开(公告)号：US20170271305A1

公开(公告)日：2017-09-21

申请号：US15615693

申请日：2017-06-06

申请人： STATS ChipPAC Pte. Ltd.

发明人： Yaojian Lin ,  Pandi C. Marimuthu ,  Il Kwon Shim ,  Byung Joon Han

IPC分类号： H01L23/00 ,  H01L21/56 ,  H01L23/31

摘要： A semiconductor device includes a semiconductor die and an encapsulant deposited over and around the semiconductor die. A semiconductor wafer includes a plurality of semiconductor die and a base semiconductor material. A groove is formed in the base semiconductor material. The semiconductor wafer is singulated through the groove to separate the semiconductor die. The semiconductor die are disposed over a carrier with a distance of 500 micrometers (μm) or less between semiconductor die. The encapsulant covers a sidewall of the semiconductor die. A fan-in interconnect structure is formed over the semiconductor die while the encapsulant remains devoid of the fan-in interconnect structure. A portion of the encapsulant is removed from a non-active surface of the semiconductor die. The device is singulated through the encapsulant while leaving encapsulant disposed covering a sidewall of the semiconductor die. The encapsulant covering the sidewall includes a thickness of 50 μm or less.

公开(公告)号：US20170133270A1

公开(公告)日：2017-05-11

申请号：US15414469

申请日：2017-01-24

申请人： STATS ChipPAC Pte. Ltd.

发明人： Thomas J. Strothmann ,  Damien M. Pricolo ,  Il Kwon Shim ,  Yaojian Lin ,  Heinz-Peter Wirtz ,  Seung Wook Yoon ,  Pandi C. Marimuthu

IPC分类号： H01L21/78 ,  H01L23/00 ,  H01L23/31 ,  H01L23/498 ,  H01L21/56 ,  H01L21/683

CPC分类号： H01L21/78 ,  H01L21/561 ,  H01L21/568 ,  H01L21/6836 ,  H01L23/28 ,  H01L23/3114 ,  H01L23/3135 ,  H01L23/49816 ,  H01L23/522 ,  H01L24/12 ,  H01L24/19 ,  H01L24/73 ,  H01L24/96 ,  H01L24/97 ,  H01L2221/68327 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/951 ,  H01L2224/97 ,  H01L2924/01322 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/3511 ,  H01L2224/81 ,  H01L2924/00012 ,  H01L2224/83 ,  H01L2224/85 ,  H01L2924/00

摘要： A semiconductor device has a carrier with a fixed size. A plurality of first semiconductor die is singulated from a first semiconductor wafer. The first semiconductor die are disposed over the carrier. The number of first semiconductor die on the carrier is independent from the size and number of first semiconductor die singulated from the first semiconductor wafer. An encapsulant is deposited over and around the first semiconductor die and carrier to form a reconstituted panel. An interconnect structure is formed over the reconstituted panel while leaving the encapsulant devoid of the interconnect structure. The reconstituted panel is singulated through the encapsulant. The first semiconductor die are removed from the carrier. A second semiconductor die with a size different from the size of the first semiconductor die is disposed over the carrier. The fixed size of the carrier is independent of a size of the second semiconductor die.

公开(公告)号：US20160351419A1

公开(公告)日：2016-12-01

申请号：US15235008

申请日：2016-08-11

申请人： STATS ChipPAC Pte. Ltd.

发明人： Yaojian Lin ,  Kang Chen ,  Hin Hwa Goh ,  Il Kwon Shim

IPC分类号： H01L21/48 ,  H01L21/56 ,  H01L23/498

CPC分类号： H01L21/485 ,  H01L21/4853 ,  H01L21/486 ,  H01L21/561 ,  H01L21/568 ,  H01L23/13 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49833 ,  H01L23/49838 ,  H01L23/5385 ,  H01L23/5386 ,  H01L23/5389 ,  H01L23/562 ,  H01L24/19 ,  H01L24/20 ,  H01L24/96 ,  H01L24/97 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/24155 ,  H01L2224/97 ,  H01L2225/1035 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2225/107 ,  H01L2924/01322 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/3511 ,  H01L2924/00 ,  H01L2224/82

摘要： A semiconductor device has a substrate. A conductive via is formed through the substrate. A plurality of first contact pads is formed over a first surface of the substrate. A plurality of second contact pads is formed over a second surface of the substrate. A dummy pattern is formed over the second surface of the substrate. An indentation is formed in a sidewall of the substrate. An opening is formed through the substrate. An encapsulant is deposited in the opening. An insulating layer is formed over second surface of the substrate. A dummy opening is formed in the insulating layer. A semiconductor die is disposed adjacent to the substrate. An encapsulant is deposited over the semiconductor die and substrate. The first surface of the substrate includes a width that is greater than a width of the second surface of the substrate.