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    Semiconductor Device and Method of Forming Microelectromechanical Systems (MEMS) Package
    3.
    发明申请
    Semiconductor Device and Method of Forming Microelectromechanical Systems (MEMS) Package 有权

    公开(公告)号：US20220289560A1

    公开(公告)日：2022-09-15

    申请号：US17664789

    申请日：2022-05-24

    申请人： STATS ChipPAC Pte. Ltd.

    发明人： Yaojian Lin ,  Won Kyoung Choi ,  Kang Chen ,  Ivan Micallef

    IPC分类号： B81B7/00 ,  B81C1/00 ,  H01L21/56 ,  H01L23/538 ,  H01L23/552 ,  H01L23/00 ,  H01L25/10 ,  H01L25/00

    摘要： A semiconductor device has a first semiconductor die and a modular interconnect structure adjacent to the first semiconductor die. An encapsulant is deposited over the first semiconductor die and modular interconnect structure as a reconstituted panel. An interconnect structure is formed over the first semiconductor die and modular interconnect structure. An active area of the first semiconductor die remains devoid of the interconnect structure. A second semiconductor die is mounted over the first semiconductor die with an active surface of the second semiconductor die oriented toward an active surface of the first semiconductor die. The reconstituted panel is singulated before or after mounting the second semiconductor die. The first or second semiconductor die includes a microelectromechanical system (MEMS). The second semiconductor die includes an encapsulant and an interconnect structure formed over the second semiconductor die. Alternatively, the second semiconductor die is mounted to an interposer disposed over the interconnect structure.

    Semiconductor Device and Method of Forming Double-Sided Fan-Out Wafer Level Package
    4.
    发明申请
    Semiconductor Device and Method of Forming Double-Sided Fan-Out Wafer Level Package 审中-公开

    公开(公告)号：US20200006215A1

    公开(公告)日：2020-01-02

    申请号：US16570049

    申请日：2019-09-13

    申请人： STATS ChipPAC Pte. Ltd.

    发明人： Il Kwon Shim ,  Pandi C. Marimuthu ,  Won Kyoung Choi ,  Sze Ping Goh ,  Jose A. Caparas

    IPC分类号： H01L23/498 ,  H01L21/56 ,  H01L23/31

    摘要： A semiconductor device comprises a first semiconductor package including a conductive layer. A substrate including an interconnect structure is disposed over the conductive layer. The interconnect structure of the substrate with the conductive layer of the first semiconductor package are self-aligned. A plurality of openings is formed in the substrate. An adhesive is disposed between the substrate and the first semiconductor package and in the openings of the substrate. A redistribution layer (RDL) is formed over the first semiconductor package opposite the substrate. A pitch of the substrate is different from a pitch of the RDL. The adhesive extends to the interconnect structure of the substrate. A second semiconductor package is disposed over the substrate and the first semiconductor package.

    Method of Packaging Thin Die and Semiconductor Device Including Thin Die
    5.
    发明申请
    Method of Packaging Thin Die and Semiconductor Device Including Thin Die 审中-公开

    公开(公告)号：US20190287873A1

    公开(公告)日：2019-09-19

    申请号：US15919401

    申请日：2018-03-13

    申请人： STATS ChipPAC Pte. Ltd.

    发明人： Won Kyoung Choi ,  Pandi Chelvam Marimuthu

    IPC分类号： H01L23/31 ,  H01L23/538 ,  H01L21/56 ,  H01L25/00 ,  H01L21/768

    摘要： A semiconductor device has a carrier and a semiconductor die disposed over the carrier. A dummy die is disposed over the carrier as well. A first encapsulant is deposited over the semiconductor die and dummy die. The dummy die and a first portion of the first encapsulant is backgrinded while a second portion of the first encapsulant remains covering the semiconductor die. Backgrinding the dummy die fully removes the dummy die while the second portion of the first encapsulant remains covering the semiconductor die. A second encapsulant is optionally deposited over the dummy die prior to disposing the dummy die over the carrier. A conductive pillar is optionally formed over the dummy die prior to depositing the second encapsulant. The carrier is removed to expose an active surface of the semiconductor die. A build-up interconnect structure is formed over the active surface after removing the carrier.

    Semiconductor device and method of forming electromagnetic (EM) shielding for LC circuits
    6.
    发明授权
    Semiconductor device and method of forming electromagnetic (EM) shielding for LC circuits 有权

    公开(公告)号：US10388612B2

    公开(公告)日：2019-08-20

    申请号：US15664734

    申请日：2017-07-31

    申请人： STATS ChipPAC Pte. Ltd.

    发明人： Yaojian Lin ,  Byung Joon Han ,  Rajendra D. Pendse ,  Il Kwon Shim ,  Pandi C. Marimuthu ,  Won Kyoung Choi ,  Linda Pei Ee Chua

    IPC分类号： H01L23/00 ,  H01L23/498 ,  H01L23/538 ,  H01L23/552 ,  H01L21/56 ,  H01L21/683

    摘要： A semiconductor device has a first component. A modular interconnect structure is disposed adjacent to the first component. A first interconnect structure is formed over the first component and modular interconnect structure. A shielding layer is formed over the first component, modular interconnect structure, and first interconnect structure. The shielding layer provides protection for the enclosed semiconductor devices against EMI, RFI, or other inter-device interference, whether generated internally or from external semiconductor devices. The shielding layer is electrically connected to an external low-impedance ground point. A second component is disposed adjacent to the first component. The second component includes a passive device. An LC circuit includes the first component and second component. A semiconductor die is disposed adjacent to the first component. A conductive adhesive is disposed over the modular interconnect structure. The modular interconnect structure includes a height less than a height of the first component.

    Semiconductor device and method of forming microelectromechanical systems (MEMS) package
    8.
    发明授权
    Semiconductor device and method of forming microelectromechanical systems (MEMS) package 有权

    公开(公告)号：US10662056B2

    公开(公告)日：2020-05-26

    申请号：US16169817

    申请日：2018-10-24

    申请人： STATS ChipPAC Pte. Ltd.

    发明人： Yaojian Lin ,  Won Kyoung Choi ,  Kang Chen ,  Ivan Micallef

    IPC分类号： B81B7/00 ,  B81C1/00 ,  H01L21/56 ,  H01L23/538 ,  H01L23/552 ,  H01L23/00 ,  H01L25/10 ,  H01L25/00

    摘要： A semiconductor device has a first semiconductor die and a modular interconnect structure adjacent to the first semiconductor die. An encapsulant is deposited over the first semiconductor die and modular interconnect structure as a reconstituted panel. An interconnect structure is formed over the first semiconductor die and modular interconnect structure. An active area of the first semiconductor die remains devoid of the interconnect structure. A second semiconductor die is mounted over the first semiconductor die with an active surface of the second semiconductor die oriented toward an active surface of the first semiconductor die. The reconstituted panel is singulated before or after mounting the second semiconductor die. The first or second semiconductor die includes a microelectromechanical system (MEMS). The second semiconductor die includes an encapsulant and an interconnect structure formed over the second semiconductor die. Alternatively, the second semiconductor die is mounted to an interposer disposed over the interconnect structure.

    Method of packaging thin die and semiconductor device including thin die
    9.
    发明授权
    Method of packaging thin die and semiconductor device including thin die 有权

    公开(公告)号：US10510632B2

    公开(公告)日：2019-12-17

    申请号：US15919401

    申请日：2018-03-13

    申请人： STATS ChipPAC Pte. Ltd.

    发明人： Won Kyoung Choi ,  Pandi Chelvam Marimuthu

    IPC分类号： H01L21/44 ,  H01L21/48 ,  H01L21/50 ,  H01L23/31 ,  H01L23/538 ,  H01L21/768 ,  H01L25/00 ,  H01L21/56

    摘要： A semiconductor device has a carrier and a semiconductor die disposed over the carrier. A dummy die is disposed over the carrier as well. A first encapsulant is deposited over the semiconductor die and dummy die. The dummy die and a first portion of the first encapsulant is backgrinded while a second portion of the first encapsulant remains covering the semiconductor die. Backgrinding the dummy die fully removes the dummy die while the second portion of the first encapsulant remains covering the semiconductor die. A second encapsulant is optionally deposited over the dummy die prior to disposing the dummy die over the carrier. A conductive pillar is optionally formed over the dummy die prior to depositing the second encapsulant. The carrier is removed to expose an active surface of the semiconductor die. A build-up interconnect structure is formed over the active surface after removing the carrier.

    Semiconductor device and method of forming microelectromechanical systems (MEMS) package
    10.
    发明授权
    Semiconductor device and method of forming microelectromechanical systems (MEMS) package 有权

    公开(公告)号：US10189702B2

    公开(公告)日：2019-01-29

    申请号：US15362199

    申请日：2016-11-28

    申请人： STATS ChipPAC Pte. Ltd.

    发明人： Yaojian Lin ,  Won Kyoung Choi ,  Kang Chen ,  Ivan Micallef

    IPC分类号： B81B7/00 ,  B81C1/00 ,  H01L21/56 ,  H01L23/538 ,  H01L23/552 ,  H01L23/00 ,  H01L25/10 ,  H01L25/00

    摘要： A semiconductor device has a first semiconductor die and a modular interconnect structure adjacent to the first semiconductor die. An encapsulant is deposited over the first semiconductor die and modular interconnect structure as a reconstituted panel. An interconnect structure is formed over the first semiconductor die and modular interconnect structure. An active area of the first semiconductor die remains devoid of the interconnect structure. A second semiconductor die is mounted over the first semiconductor die with an active surface of the second semiconductor die oriented toward an active surface of the first semiconductor die. The reconstituted panel is singulated before or after mounting the second semiconductor die. The first or second semiconductor die includes a microelectromechanical system (MEMS). The second semiconductor die includes an encapsulant and an interconnect structure formed over the second semiconductor die. Alternatively, the second semiconductor die is mounted to an interposer disposed over the interconnect structure.