Patent search ap:("Micron Technology Page Inc.") AND inv:"Roy Meade"

51.

发明授权
Semiconductor substrate for photonic and electronic structures and method of manufacture 有权
Title translation: 用于光子和电子结构的半导体衬底及其制造方法

公开(公告)号：US09034724B2

公开(公告)日：2015-05-19

申请号：US14446744

申请日：2014-07-30

Applicant: Micron Technology, Inc.

Inventor： Roy Meade , Gurtej Sandhu

IPC: H01L21/76 , H01L29/00 , H01L21/762 , G02B6/136 , H01L27/146 , H01L29/06 , G02B6/12

CPC classification number: H01L21/76229 , G02B6/1225 , G02B6/13 , G02B6/136 , G02B2006/121 , H01L21/3086 , H01L21/76232 , H01L21/76283 , H01L27/092 , H01L27/14689 , H01L29/0649

Abstract: A method of forming a substrate with isolation areas suitable for integration of electronic and photonic devices is provided. A common reticle and photolithographic technique is used to fabricate a mask defining openings for etching first and second trench isolation areas in a substrate, with the openings for the second trench isolation areas being wider than the openings for the first trench isolation areas. The first and second trench isolation areas are etched in the substrate through the mask. The second trench isolation areas are further etched to the deeper than the first trench isolation areas. The trench isolation areas are filled with oxide material. Electrical devices can be formed on the substrate and electrically isolated by the first trench isolation areas and photonic devices can be formed over the second trench isolation areas and be optically isolated from the substrate.

Abstract translation: 提供了一种形成具有适用于电子和光子器件集成的隔离区的衬底的方法。常用的掩模版和光刻技术用于制造掩模，其限定用于蚀刻衬底中的第一和第二沟槽隔离区的开口，其中用于第二沟槽隔离区的开口比第一沟槽隔离区的开口宽。通过掩模在衬底中蚀刻第一和第二沟槽隔离区域。第二沟槽隔离区域被进一步蚀刻到比第一沟槽隔离区域更深的位置。沟槽隔离区填充氧化物材料。电子器件可以形成在衬底上并由第一沟槽隔离区域电隔离，并且光子器件可以形成在第二沟槽隔离区域上并且与衬底光学隔离。

52.

发明授权
Photonic device structure and method of manufacture 有权
Title translation: 光子器件结构及制造方法

公开(公告)号：US09005458B2

公开(公告)日：2015-04-14

申请号：US13776836

申请日：2013-02-26

Applicant: Micron Technology, Inc.

Inventor： Gurtej Sandhu , Roy Meade

IPC: B29D11/00 , H01L21/308 , G02B6/136 , G02B6/12

CPC classification number: G02B6/1225 , G02B6/12004 , G02B6/136 , G02B2006/12097 , H01L21/308

Abstract: Disclosed method and apparatus embodiments provide a photonic device with optical isolation from a supporting substrate. A generally rectangular cavity in cross section is provided below an element of the photonic device and the element may be formed from a ledge of the supporting substrate which is over the cavity.

Abstract translation: 公开的方法和设备实施例提供了一种具有与支撑衬底的光学隔离的光子器件。在光子器件的元件的下方提供横截面的大致矩形的空腔，并且元件可以由在空腔上的支撑衬底的凸缘形成。

53.

发明申请
OPTICAL WAVEGUIDE WITH CASCADED MODULATOR CIRCUITS 有权
Title translation: 带调制器电路的光波导

公开(公告)号：US20140126854A1

公开(公告)日：2014-05-08

申请号：US14153342

申请日：2014-01-13

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Roy Meade , Gurtej Sandhu

IPC: G02F1/035

CPC classification number: H04B10/516 , G02B6/12007 , G02B6/122 , G02B6/29343 , G02F1/035 , G02F1/2252

Abstract: An optical waveguide for transmitting an optical signal input to the optical waveguide with a first frequency. The optical waveguide includes a plurality of modulator circuits configured along an optical transmission channel. Each modulator circuit includes at least one resonant structure that resonates at the first frequency when the modulator circuit that includes the at least one resonant structure is at a resonant temperature. Each modulator circuit has a different resonant temperature.

Abstract translation: 一种光波导，用于以第一频率传输输入到光波导的光信号。光波导包括沿着光传输通道配置的多个调制器电路。每个调制器电路包括当包括至少一个谐振结构的调制器电路处于共振温度时以第一频率谐振的至少一个谐振结构。每个调制器电路具有不同的谐振温度。

54.

发明申请
METHODS AND SYSTEMS FOR HERMETICALLY SEALED FIBER TO CHIP CONNECTIONS 有权

公开(公告)号：US20210141174A1

公开(公告)日：2021-05-13

申请号：US17153482

申请日：2021-01-20

Applicant: Micron Technology, Inc.

Inventor： Roy Meade , Gurtej Sandhu

IPC: G02B6/42 , G02B6/30 , G02B6/12 , G02B6/25 , G02B6/255 , G02B6/26

Abstract: Disclosed are methods of providing a hermetically sealed optical connection between an optical fiber and an optical element of a chip and a photonic-integrated chip manufactured using such methods.

55.

发明授权
Method and optoelectronic structure providing polysilicon photonic devices with different optical properties in different regions 有权

公开(公告)号：US10903377B2

公开(公告)日：2021-01-26

申请号：US16384037

申请日：2019-04-15

Applicant: Micron Technology, Inc. , Massachusetts Institute of Technology

Inventor： Roy Meade , Karan Mehta , Efraim Megged , Jason Orcutt , Milos Popovic , Rajeev Ram , Jeffrey Shainline , Zvi Sternberg , Vladimir Stojanovic , Ofer Tehar-Zahav

IPC: H01L31/0232 , H01L31/18 , H01L31/0368 , H01L27/144

Abstract: Method and structural embodiments are described which provide an integrated structure using polysilicon material having different optical properties in different regions of the structure.

56.

发明授权
Methods and apparatus providing thermal isolation of photonic devices 有权

公开(公告)号：US10777722B2

公开(公告)日：2020-09-15

申请号：US16105755

申请日：2018-08-20

Applicant: Micron Technology, Inc.

Inventor： Roy Meade , Gurtej Sandhu

IPC: H01L21/302 , H01L33/64 , G02F1/01 , G02F1/313 , G02B6/12

Abstract: Described embodiments include photonic integrated circuits and systems with photonic devices, including thermal isolation regions for the photonic devices. Methods of fabricating such circuits and systems are also described.

57.

发明授权
Methods of adjusting flatband voltage of a memory device 有权

公开(公告)号：US09881932B2

公开(公告)日：2018-01-30

申请号：US15098605

申请日：2016-04-14

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Roy Meade

IPC: G11C11/34 , H01L27/11568 , H01L29/423 , H01L29/51 , H01L29/792 , H01L21/02 , H01L27/115 , H01L21/28 , H01L21/326 , H01L27/11521 , H01L29/788 , H01L29/78

CPC classification number: H01L27/11568 , H01L21/02112 , H01L21/02318 , H01L21/28176 , H01L21/326 , H01L27/115 , H01L27/11521 , H01L29/4234 , H01L29/51 , H01L29/78 , H01L29/7883 , H01L29/792

Abstract: Methods for adjusting a flatband voltage of a memory device, including applying a voltage to a control gate of the memory device such that charged species are moved to one of a plurality of different levels in a dielectric material in response to the voltage, wherein the plurality of different levels is greater than two.

58.

发明申请
METHODS AND SYSTEMS FOR HERMETICALLY SEALED FIBER TO CHIP CONNECTIONS 审中-公开

公开(公告)号：US20180024304A1

公开(公告)日：2018-01-25

申请号：US15714886

申请日：2017-09-25

Applicant: Micron Technology, Inc.

Inventor： Roy Meade , Gurtej Sandhu

IPC: G02B6/42 , G02B6/26 , G02B6/255 , G02B6/12 , G02B6/25 , G02B6/30

CPC classification number: G02B6/4251 , G02B6/12 , G02B6/25 , G02B6/255 , G02B6/262 , G02B6/305 , G02B6/424

Abstract: Disclosed are methods of providing a hermetically sealed optical connection between an optical fiber and an optical element of a chip and a photonic-integrated chip manufactured using such methods.