METHODS FOR FORMING 2-DIMENSIONAL SELF-ALIGNED VIAS

    公开(公告)号:US20170294348A1

    公开(公告)日:2017-10-12

    申请号:US15453675

    申请日:2017-03-08

    CPC classification number: H01L21/76897 H01L21/76834 H01L21/76883

    Abstract: A method of processing a substrate includes: depositing an etch stop layer atop a first dielectric layer; forming a feature in the etch stop layer and the first dielectric layer; depositing a first metal layer to fill the feature; etching the first metal layer to form a recess; depositing a second dielectric layer to fill the recess wherein the second dielectric layer is a low-k material suitable as a metal and oxygen diffusion barrier; forming a patterned mask layer atop the substrate to expose a portion of the second dielectric layer and the etch stop layer; etching the exposed portion of the second dielectric layer to a top surface of the first metal layer to form a via in the second dielectric layer; and depositing a second metal layer atop the substrate, wherein the second metal layer is connected to the first metal layer by the via.

    PLASMA UNIFORMITY CONTROL BY ARRAYS OF UNIT CELL PLASMAS
    53.
    发明申请
    PLASMA UNIFORMITY CONTROL BY ARRAYS OF UNIT CELL PLASMAS 有权
    等离子体等离子体等离子体均匀控制

    公开(公告)号:US20160053376A1

    公开(公告)日:2016-02-25

    申请号:US14489398

    申请日:2014-09-17

    Abstract: The present invention provides an apparatus having a plasma profile control plate disposed in a plasma processing chamber so as to locally alter plasma density to provide uniform plasma distribution across a substrate surface during processing. In one embodiment, a process kit includes a plate configured to be disposed in a plasma processing chamber, a plurality of apertures formed therethrough, the apertures configured to permit processing gases to flow through the plate, and an array of unit cells including at least one aperture formed in the plate, wherein each unit cell has an electrode assembly individually controllable relative to electrode assemblies disposed in at least two other unit cells.

    Abstract translation: 本发明提供了一种装置,其具有设置在等离子体处理室中的等离子体轮廓控制板,从而局部地改变等离子体密度,以在处理期间在衬底表面上提供均匀的等离子体分布。 在一个实施例中,处理套件包括被配置为设置在等离子体处理室中的板,通过其形成的多个孔,所述孔被构造成允许处理气体流过板,以及包括至少一个 孔,其中每个单元电池具有相对于设置在至少两个其它单元电池中的电极组件可独立控制的电极组件。

    GRAZING ANGLE PLASMA PROCESSING FOR MODIFYING A SUBSTRATE SURFACE
    54.
    发明申请
    GRAZING ANGLE PLASMA PROCESSING FOR MODIFYING A SUBSTRATE SURFACE 审中-公开
    用于修改基板表面的压光角度等离子体处理

    公开(公告)号:US20150255243A1

    公开(公告)日:2015-09-10

    申请号:US14641071

    申请日:2015-03-06

    Abstract: Embodiments of the disclosure provide apparatus and methods for modifying a surface of a substrate using a plasma modification process. In one embodiment, a process generally includes the removal and/or redistribution of a portion of an exposed surface of the substrate by use of an energetic particle beam while the substrate is disposed within a particle beam modification apparatus. Embodiments may also provide a plasma modification process that includes one or more pre-planarization processing steps and/or one or more post-planarization processing steps that are all performed within one processing system. Some embodiments may provide an apparatus and methods for planarizing a surface of a substrate by performing all of the plasma modification processes within either the same processing chamber, the same processing system or within processing chambers found in two or more processing systems.

    Abstract translation: 本公开的实施例提供了使用等离子体修饰工艺来修饰衬底的表面的装置和方法。 在一个实施方案中,方法通常包括通过使用能量粒子束来去除和/或重新分配衬底的暴露表面的一部分,同时将衬底设置在粒子束修改设备内。 实施例还可以提供等离子体修饰过程,其包括一个或多个预平面化处理步骤和/或一个或多个在一个处理系统内执行的后平面化处理步骤。 一些实施例可以提供用于通过执行在两个或更多个处理系统中找到的相同处理室,相同处理系统或处理室内的所有等离子体修饰过程来平坦化衬底表面的装置和方法。

    METHODS FOR ETCHING A DIELECTRIC BARRIER LAYER IN A DUAL DAMASCENE STRUCTURE
    55.
    发明申请
    METHODS FOR ETCHING A DIELECTRIC BARRIER LAYER IN A DUAL DAMASCENE STRUCTURE 有权
    在双重大气结构中蚀刻介电障碍层的方法

    公开(公告)号:US20150214101A1

    公开(公告)日:2015-07-30

    申请号:US14540577

    申请日:2014-11-13

    Abstract: Methods for eliminating early exposure of a conductive layer in a dual damascene structure and for etching a dielectric barrier layer in the dual damascene structure are provided. In one embodiment, a method for etching a dielectric barrier layer disposed on a substrate includes patterning a substrate having a dielectric bulk insulating layer disposed on a dielectric barrier layer using a hardmask layer disposed on the dielectric bulk insulating layer as an etching mask, exposing a portion of the dielectric barrier layer after removing the dielectric bulk insulating layer uncovered by the dielectric bulk insulating layer, removing the hardmask layer from the substrate, and subsequently etching the dielectric barrier layer exposed by the dielectric bulk insulating layer.

    Abstract translation: 提供了用于消除双镶嵌结构中的导电层的早期暴露并用于蚀刻双镶嵌结构中的介电阻挡层的方法。 在一个实施例中,用于蚀刻设置在衬底上的电介质阻挡层的方法包括使用设置在介电体绝缘层上的硬掩模层作为蚀刻掩模来图案化设置在电介质阻挡层上的介电体绝缘层的衬底, 在去除绝缘体绝缘层未覆盖的绝缘体绝缘层之后,从基板去除硬掩模层,随后蚀刻由绝缘体绝缘层暴露的电介质阻挡层的部分介电阻挡层。

    METHOD FOR STABILIZING AN INTERFACE POST ETCH TO MINIMIZE QUEUE TIME ISSUES BEFORE NEXT PROCESSING STEP
    56.
    发明申请
    METHOD FOR STABILIZING AN INTERFACE POST ETCH TO MINIMIZE QUEUE TIME ISSUES BEFORE NEXT PROCESSING STEP 审中-公开
    用于在接下来的处理步骤之前稳定接口后处理以最小化队列时间问题的方法

    公开(公告)号:US20150079799A1

    公开(公告)日:2015-03-19

    申请号:US14029771

    申请日:2013-09-17

    Abstract: Methods for etching a dielectric barrier layer disposed on the substrate using a low temperature etching process along with a subsequent interface protection layer deposition process are provided. In one embodiment, a method for etching a dielectric barrier layer disposed on a substrate includes transferring a substrate having a dielectric barrier layer disposed thereon into an etching processing chamber, performing a treatment process on the dielectric barrier layer, remotely generating a plasma in an etching gas mixture supplied into the etching processing chamber to etch the treated dielectric barrier layer disposed on the substrate, plasma annealing the dielectric barrier layer to remove the dielectric barrier layer from the substrate, and forming an interface protection layer after the dielectric barrier is removed from the substrate.

    Abstract translation: 提供了使用低温蚀刻工艺以及随后的界面保护层沉积工艺来蚀刻设置在基板上的电介质阻挡层的方法。 在一个实施例中,用于蚀刻设置在基板上的电介质阻挡层的方法包括将其上设置有介电阻挡层的基板转印到蚀刻处理室中,对介电阻挡层进行处理工艺,在蚀刻中远程产生等离子体 气体混合物供应到蚀刻处理室中以蚀刻设置在基板上的经处理的介电阻挡层,等离子体对介电阻挡层进行退火以从基板移除电介质阻挡层,并且在介电阻挡层从基板去除之后形成界面保护层 基质。

    SELECTIVE DEPOSITION OF METAL OXIDE BY PULSED CHEMICAL VAPOR DEPOSITION

    公开(公告)号:US20230122224A1

    公开(公告)日:2023-04-20

    申请号:US18072392

    申请日:2022-11-30

    Abstract: Embodiments described and discussed herein provide methods for selectively depositing a metal oxides on a substrate. In one or more embodiments, methods for forming a metal oxide material includes positioning a substrate within a processing chamber, where the substrate has passivated and non-passivated surfaces, exposing the substrate to a first metal alkoxide precursor to selectively deposit a first metal oxide layer on or over the non-passivated surface, and exposing the substrate to a second metal alkoxide precursor to selectively deposit a second metal oxide layer on the first metal oxide layer. The method also includes sequentially repeating exposing the substrate to the first and second metal alkoxide precursors to produce a laminate film containing alternating layers of the first and second metal oxide layers. Each of the first and second metal alkoxide precursors contains a different metal selected from titanium, zirconium, hafnium, aluminum, or lanthanum.

    METHODS AND APPARATUS FOR CURING DIELECTRIC MATERIAL

    公开(公告)号:US20220351969A1

    公开(公告)日:2022-11-03

    申请号:US17624174

    申请日:2020-06-19

    Abstract: Methods and apparatus for forming an integrated circuit structure, comprising: delivering a process gas to a process volume of a process chamber; applying low frequency RF power to an electrode formed from a high secondary electron emission coefficient material disposed in the process volume; generating a plasma comprising ions in the process volume; bombarding the electrode with the ions to cause the electrode to emit electrons and form an electron beam; and contacting a dielectric material with the electron beam to cure the dielectric material, wherein the dielectric material is a flowable chemical vapor deposition product. In embodiments, the curing stabilizes the dielectric material by reducing the oxygen content and increasing the nitrogen content of the dielectric material.

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