Method of fabricating EEPROM using oblique implantation
    51.
    发明授权
    Method of fabricating EEPROM using oblique implantation 失效
    使用倾斜植入制造EEPROM的方法

    公开(公告)号:US5891774A

    公开(公告)日:1999-04-06

    申请号:US707076

    申请日:1996-09-03

    CPC classification number: H01L27/11521 H01L27/115

    Abstract: A semiconductor memory device is provided which comprises: a plurality of memory cell transistors each having a tunnel oxide film formed on a semiconductor substrate of a first conductivity type, a floating gate formed on the tunnel oxide film, a control gate overlaid on the floating gate with intervention of an insulating film, source/drain regions of a second conductivity type formed in the semiconductor substrate, and a high-concentration impurity layer of the first conductivity type formed in a portion adjacent to the drain region below the floating gate by oblique ion implantation employing an implantation angle .theta. with respect to a normal line to the semiconductor substrate; the plurality of memory cell transistors each sharing a source region with a memory cell transistor disposed adjacent thereto on one side thereof and a drain region with a memory cell transistor disposed adjacent thereto on the other side thereof; the implantation angle .theta. being defined by the following expression:0

    Abstract translation: 提供了一种半导体存储器件,其包括:多个存储单元晶体管,每个存储单元晶体管具有形成在第一导电类型的半导体衬底上的隧道氧化物膜,形成在隧道氧化膜上的浮置栅极,覆盖在浮置栅极上的控制栅极 介入绝缘膜,形成在半导体衬底中的第二导电类型的源极/漏极区域以及通过倾斜离子形成在与浮动栅极下方的漏极区域相邻的部分中的第一导电类型的高浓度杂质层 使用相对于半导体衬底的法线的注入角度θ的注入; 所述多个存储单元晶体管分别与存储单元晶体管在其一侧相邻设置有源极区域,在其另一侧与存储单元晶体管相邻配置的漏极区域共享源极区域; 注入角度θ由以下表达式定义:0

    Snap-zipper and bag with the same
    52.
    发明授权
    Snap-zipper and bag with the same 失效
    揿拉链和袋子一样

    公开(公告)号:US5817380A

    公开(公告)日:1998-10-06

    申请号:US827644

    申请日:1997-04-10

    Applicant: Kenichi Tanaka

    Inventor: Kenichi Tanaka

    Abstract: A snap-zipper 10 comprises a male and a female member 11 and 12 having strip-like bases 21 and 22 for fusion bonding, the bases being made of an ethylene.multidot..alpha.-olefin copolymer with a MI of 0.3 to 15 g per 10 min., a density of 0.850 to 0.935 g/ml, a molecular weight distribution of 2 to 5, a molecular-weight-dependent width of branch number of 0 to 5 per 1,000 carbon atoms, an olthodichloroenzene soluble component content of 10% by weight or below, and a maximum melting point determined with a differential scan calorimeter of 115.degree. C. or below. A bag 30 with a snap-zipper is obtained by fusion bonding the stems 21 and 25 of the snap-zipper 10 to a bag body 31.

    Abstract translation: 弹性拉链10包括阳和阴构件11和12,阴构件11和12具有用于熔融粘合的带状基底21和22,该基底由MI为0.3至15g / 10min的乙烯基-α-烯烃共聚物制成。 ,密度为0.850〜0.935g / ml,分子量分布为2〜5,分支数为0〜5个/ 1000个碳原子的分子量依赖性宽度,2,5-二氯苯可溶成分含量为10重量% 并且用差示扫描量热计测定的最大熔点为115℃或更低。 通过将卡扣拉链10的杆21和25熔合到袋体31上,获得具有卡扣拉链的袋子30。

    DRAM and MROM cells with similar structure
    53.
    发明授权
    DRAM and MROM cells with similar structure 失效
    DRAM和MROM单元结构相似

    公开(公告)号:US5606193A

    公开(公告)日:1997-02-25

    申请号:US316835

    申请日:1994-10-03

    CPC classification number: H01L27/105 H01L27/108

    Abstract: A semiconductor memory has a random access memory (DRAM) and a mask read only memory (MROM) formed on the same semiconductor substrate; each of the DRAM and MROM comprising a plurality of word lines, a plurality of bit lines and a plurality of memory cells: each of the memory cells included in the DRAM and the MROM comprising; a switching element including a source and drain regions and a gate electrode; a capacitance element formed of a lamination of an insulating film and a plate electrode subsequently laminated in this order; and a conductive parts connecting the switching element to the word lines, the bit lines, and a capacitance element; the MROM including a predetermined memory cell which lacks at least one part of the conductive parts.

    Abstract translation: 半导体存储器具有形成在同一半导体衬底上的随机存取存储器(DRAM)和掩模只读存储器(MROM); DRAM和MROM中的每一个包括多个字线,多个位线和多个存储器单元:DRAM中包括的每个存储单元和MROM包括: 包括源区和漏区的开关元件和栅电极; 由绝缘膜和平板电极的叠层依次层叠形成的电容元件; 以及将开关元件连接到字线,位线和电容元件的导电部件; MROM包括缺少导电部件的至少一部分的预定存储单元。

    Dynamic random access memory
    55.
    发明授权
    Dynamic random access memory 失效
    动态随机存取存储器

    公开(公告)号:US5383151A

    公开(公告)日:1995-01-17

    申请号:US101248

    申请日:1993-08-02

    CPC classification number: H01L27/10808 Y10S257/905 Y10S257/907

    Abstract: A dynamic random access memory includes a plurality of DRAM cell units having a bit contact region and DRAM cells formed on an active region, wherein the DRAM cells each comprised of a transistor and a capacitor connected to the transistor are arranged symmetrically to the right and left sides in a bit contact connected with the active region to form the DRAM cell unit; and the DRAM cell units are arranged with a prescribed pitch in the direction of X and arranged in the direction of Y shifted with one third of the pitch toward the direction of X.

    Abstract translation: 动态随机存取存储器包括具有位触摸区域和形成在有源区域上的DRAM单元的多个DRAM单元单元,其中每个由晶体管和连接到该晶体管的电容器组成的DRAM单元对称地布置在右侧和左侧 与有源区域连接的一部分接触面形成DRAM单元; 并且DRAM单元单元以X的方向以规定的间距排列,并且沿与X的方向三分之一的Y方向排列。

    EEPROM cell
    59.
    发明授权
    EEPROM cell 失效
    EEPROM单元

    公开(公告)号:US4803662A

    公开(公告)日:1989-02-07

    申请号:US896719

    申请日:1986-08-15

    Applicant: Kenichi Tanaka

    Inventor: Kenichi Tanaka

    CPC classification number: G11C16/0441 H01L27/115

    Abstract: An EEPROM cell for a memory device comprises a pair of bit lines each including a floating-gate MOS transistor such that a selected one of the transistors can be charged while the other is in uncharged condition by applying a higher voltage to a corresponding one of the bit lines and a lower voltage to the other bit line. Information stored in such a cell can thus be rewritten simply by applying a high voltage to one of the pair of its bit lines without carrying out a time-consuming ERASE mode of operation.

    Abstract translation: 用于存储器件的EEPROM单元包括一对位线,每个位线包括浮栅MOS晶体管,使得所选择的一个晶体管可以被充电,而另一个处于不充电状态,通过对相应的一个 位线和较低的电压到另一个位线。 因此,可以简单地通过对一对位线中的一个位线施加高电压而不进行耗时的擦除操作模式来重写存储在这样的单元中的信息。

    Apparatus for manufacturing plastic pipes
    60.
    发明授权
    Apparatus for manufacturing plastic pipes 失效
    塑料管制造装置

    公开(公告)号:US3974019A

    公开(公告)日:1976-08-10

    申请号:US474344

    申请日:1974-05-29

    Applicant: Kenichi Tanaka

    Inventor: Kenichi Tanaka

    CPC classification number: B29C53/60

    Abstract: An apparatus for continuously manufacturing a reinforced plastic pipe in which a reinforced plastic strip having a substantially I-shaped reinforcing spiral core embedded therein and partly exposed out of the strip is wound on at least three segmental sleeves slidably mounted on rotary shafts whose centers are arranged at vertexes of a regular polygon, respectively. During rotation of the rotary shafts, those segmental sleeves which are in contact with an envelope that is tangent to the segmental sleeves are moved forward while those segmental sleeves which are not in contact with the envelope are moved backward in a smooth manner by a guide means. The alternate forward and backward movements of the segmental sleeves are capable of continuously manufacturing the reinforced plastic pipe without producing strain at the joints between the lateral edges of the successive turns of the plastic pipe.

    Abstract translation: 一种用于连续制造增强塑料管的装置,其中嵌入有基本上为I形的加强螺旋芯并且部分地暴露在带外的增强塑料带缠绕在可滑动地安装在其中心布置的旋转轴上的至少三个节段套筒上 分别在正多边形的顶点。 在旋转轴的旋转期间,与与分段套筒相切的外壳接触的那些节段套筒向前移动,而不与套管接触的那些节段套筒通过导向装置以平滑的方式向后移动 。 节段套筒的交替向前和向后移动能够连续地制造增强塑料管,而不会在塑料管的连续匝的侧边缘之间的接合处产生应变。

Patent Agency Ranking