公开(公告)号：US11532662B2

公开(公告)日：2022-12-20

申请号：US17183871

申请日：2021-02-24

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Chia-Yu Wei ,  Yen-Liang Lin ,  Kuo-Cheng Lee ,  Hsun-Ying Huang ,  Hsin-Chi Chen

IPC: H01L27/146 ,  H01L31/103 ,  H01L31/0352 ,  H01L31/0336 ,  H01L31/028 ,  H01L31/0312 ,  H01L31/0304 ,  H01L31/0296

Abstract: A method includes providing a semiconductor substrate having a front side surface and a back side surface opposite to the front side surface. A photosensitive region of the semiconductor substrate is etched to form a recess. A semiconductor material is deposited on the semiconductor substrate to form a radiation sensing member filling the recess. The semiconductor material has an optical band gap energy smaller than 1.77 eV. A device layer is formed over the front side surface of the semiconductor substrate and the radiation sensing member. A trench isolation is formed in an isolation region of the semiconductor substrate and extending from the back side surface of the semiconductor substrate.

公开(公告)号：US20220359370A1

公开(公告)日：2022-11-10

申请号：US17869196

申请日：2022-07-20

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Cheng-Yuan Li ,  Kuo-Cheng Lee ,  Yun-Wei Cheng ,  Yen-Liang Lin

IPC: H01L23/528 ,  H01L23/522 ,  H01L23/00 ,  H01L23/544

Abstract: Exemplary embodiments for redistribution layers of integrated circuit components are disclosed. The redistribution layers of integrated circuit components of the present disclosure include one or more arrays of conductive contacts that are configured and arranged to allow a bonding wave to displace air between the redistribution layers during bonding. This configuration and arrangement of the one or more arrays minimize discontinuities, such as pockets of air to provide an example, between the redistribution layers during the bonding.

公开(公告)号：US11189743B2

公开(公告)日：2021-11-30

申请号：US16818934

申请日：2020-03-13

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chia-Yu Wei ,  Yu-Ting Kao ,  Yen-Liang Lin ,  Wen-I Hsu ,  Hsun-Ying Huang ,  Kuo-Cheng Lee ,  Hsin-Chi Chen

IPC: H01L27/146 ,  H01L31/107 ,  H01L31/0224 ,  H01L31/0216 ,  H01L31/18 ,  H01L31/02 ,  H01L31/0232 ,  H01L31/0352

Abstract: A photodetector includes: a substrate; a first semiconductor region, the first semiconductor region extending into the substrate from a front side of the substrate; and a second semiconductor region, the second semiconductor region further extending into the substrate from a bottom boundary of the first semiconductor region, wherein when the photodetector operates under a Geiger mode, the second semiconductor region is fully depleted to absorb a radiation source received from a back side of the substrate.

公开(公告)号：US20210366833A1

公开(公告)日：2021-11-25

申请号：US16881002

申请日：2020-05-22

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Tzu-Sung Huang ,  Cheng-Chieh Hsieh ,  Hsiu-Jen Lin ,  Hui-Jung Tsai ,  Hung-Yi Kuo ,  Hao-Yi Tsai ,  Ming-Hung Tseng ,  Yen-Liang Lin ,  Chun-Ti Lu ,  Chung-Ming Weng

IPC: H01L23/538 ,  H01L23/31 ,  H01L25/065 ,  H01L23/00 ,  H01L21/56 ,  H01L21/78 ,  H01L25/00

Abstract: A package structure including a first semiconductor die, a second semiconductor die, first conductive pillars and a first insulating encapsulation is provided. The first semiconductor die includes a semiconductor substrate, an interconnect structure and a first redistribution circuit structure. The semiconductor substrate includes a first portion and a second portion disposed on the first portion. The interconnect structure is disposed on the second portion, the first redistribution circuit structure is disposed on the interconnect structure, and the lateral dimension of the first portion is greater than the lateral dimension of the second portion. The second semiconductor die is disposed on the first semiconductor die. The first conductive pillars are disposed on the first redistribution circuit structure of the first semiconductor die. The first insulating encapsulation is disposed on the first portion. The first insulating encapsulation laterally encapsulates the second semiconductor die, the first conductive pillars and the second portion.

公开(公告)号：US10943942B2

公开(公告)日：2021-03-09

申请号：US15809458

申请日：2017-11-10

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Chia-Yu Wei ,  Yen-Liang Lin ,  Kuo-Cheng Lee ,  Hsun-Ying Huang ,  Hsin-Chi Chen

IPC: H01L27/146 ,  H01L31/103 ,  H01L31/0352 ,  H01L31/0336 ,  H01L31/028 ,  H01L31/0312 ,  H01L31/0304 ,  H01L31/0296

Abstract: An image sensor device includes a semiconductor substrate, a radiation sensing member, a device layer and a trench isolation. The semiconductor substrate has a front side surface and a back side surface opposite to the front side surface. The radiation sensing member is disposed in a photosensitive region of the semiconductor substrate and extends from the front side surface of the semiconductor substrate. The radiation sensing member includes a semiconductor material with an optical band gap energy smaller than 1.77 eV. The device layer is over the front side surface of the semiconductor substrate and the radiation sensing member. The trench isolation is disposed in an isolation region of the semiconductor substrate and extends from the back side surface of the semiconductor substrate.

公开(公告)号：US20200350782A1

公开(公告)日：2020-11-05

申请号：US16933415

申请日：2020-07-20

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chen-Hua Yu ,  Chita Chuang ,  Chen-Shien Chen ,  Ming Hung Tseng ,  Sen-Kuei Hsu ,  Yu-Feng Chen ,  Yen-Liang Lin

IPC: H02J50/10 ,  H01F27/28 ,  H01F41/04 ,  H01F38/14 ,  H02J50/00 ,  H02J50/40 ,  H02J7/00 ,  H02J7/04

Abstract: Wireless charging devices, methods of manufacture thereof, and methods of charging electronic devices are disclosed. In some embodiments, a wireless charging device includes a controller, a molding material disposed around the controller, and an interconnect structure disposed over the molding material and coupled to the controller. The wireless charging device includes a wireless charging coil coupled to the controller. The wireless charging coil comprises a first portion disposed in the interconnect structure and a second portion disposed in the molding material. The wireless charging coil is adapted to provide an inductance to charge an electronic device.

公开(公告)号：US10388622B2

公开(公告)日：2019-08-20

申请号：US15803008

申请日：2017-11-03

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chih-Horng Chang ,  Tin-Hao Kuo ,  Chen-Shien Chen ,  Yen-Liang Lin

IPC: H01L23/00 ,  H01L25/00

Abstract: In some embodiments, the present disclosure relates to a method of integrated chip bonding. The method is performed by forming a metal layer on a substrate, and forming a solder layer on the metal layer. The solder layer is reflowed. The metal layer and the solder layer have sidewalls defining a recess that is at least partially filled by the solder layer during reflowing of the solder layer.

公开(公告)号：US20190164924A1

公开(公告)日：2019-05-30

申请号：US15965116

申请日：2018-04-27

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Cheng-Yuan Li ,  Kuo-Cheng Lee ,  Yun-Wei Cheng ,  Yen-Liang Lin

IPC: H01L23/00

Abstract: Exemplary embodiments for redistribution layers of integrated circuits are disclosed. The redistribution layers of integrated circuits of the present disclosure include one or more arrays of conductive contacts that are configured and arranged to allow a bonding wave to displace air between the redistribution layers during bonding. This configuration and arrangement of the one or more arrays minimize discontinuities, such as pockets of air to provide an example, between the redistribution layers during the bonding.

公开(公告)号：US09520379B2

公开(公告)日：2016-12-13

申请号：US15057302

申请日：2016-03-01

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chih-Horng Chang ,  Tin-Hao Kuo ,  Chen-Shien Chen ,  Yen-Liang Lin

IPC: H01L23/00 ,  H01L25/00

CPC classification number: H01L24/16 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/81 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/05552 ,  H01L2224/05572 ,  H01L2224/05599 ,  H01L2224/10145 ,  H01L2224/11849 ,  H01L2224/13011 ,  H01L2224/13012 ,  H01L2224/13015 ,  H01L2224/13018 ,  H01L2224/13082 ,  H01L2224/13083 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/14051 ,  H01L2224/1412 ,  H01L2224/14152 ,  H01L2224/14153 ,  H01L2224/16238 ,  H01L2224/81191 ,  H01L2224/81345 ,  H01L2224/81815 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/2064 ,  Y10T428/12493 ,  Y10T428/24479 ,  H01L2924/014 ,  H01L2924/00012 ,  H01L2924/00

Abstract: In some embodiments, the present invention relates to a method of integrated chip bonding. The method forms a conductive trace on a surface of a first work piece, and a conductive bump on a surface of a second work piece. The conductive bump has a recess. A reflow process is performed on a solder layer to electrically couple the conductive trace and the conductive bump. The solder layer fills a part of the recess during the reflow process. By filling the recess during the reflow process, electrical shorting between the conductive trace and an adjacent conductive is reduced.

Abstract translation: 在一些实施例中，本发明涉及集成芯片接合的方法。 该方法在第一工件的表面上形成导电迹线，并在第二工件的表面上形成导电凸块。 导电凸块具有凹部。 在焊料层上进行回流处理，以电耦合导电迹线和导电凸块。 在回流过程中，焊料层填充凹部的一部分。 通过在回流工艺期间填充凹槽，导电迹线和相邻导电体之间的电短路减小。