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公开(公告)号:US11355466B2
公开(公告)日:2022-06-07
申请号:US16897296
申请日:2020-06-10
发明人: Po-Yuan Teng , Hao-Yi Tsai , Kuo-Lung Pan , Sen-Kuei Hsu , Tin-Hao Kuo , Yi-Yang Lei , Ying-Cheng Tseng , Chi-Hui Lai
IPC分类号: H01L23/538 , H01L23/00 , H01L23/31 , H01L21/56 , H01L21/48 , H01L21/683
摘要: A package structure including at least one semiconductor die and a redistribution structure is provided. The semiconductor die is laterally encapsulated by an encapsulant, and the redistribution structure is disposed on the semiconductor die and the encapsulant and electrically connected with the semiconductor die. The redistribution structure includes signal lines and a pair of repair lines. The signal lines include a pair of first signal lines located at a first level, and each first signal line of the pair of first signal lines has a break that split each first signal line into separate first and second fragments. The pair of repair lines is located above the pair of first signal lines and located right above the break. Opposite ending portions of each repair line are respectively connected with the first and second fragments with each repair line covering the break in each first signal line.
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公开(公告)号:US20210159185A1
公开(公告)日:2021-05-27
申请号:US16697133
申请日:2019-11-26
发明人: Sen-Kuei Hsu
IPC分类号: H01L23/552 , H01L23/31 , H01L23/538 , H01L23/66 , H01L23/00 , H01L21/48 , H01L21/56 , H01L21/683
摘要: A semiconductor package includes a die, through insulator vias, an encapsulant, and a pair of metallization layers. The through insulator vias are disposed beside the die. The encapsulant wraps the die and the through insulator vias. The pair of metallization layers is disposed on opposite sides of the encapsulant. One end of each through insulator via contacts one of the metallization layers and the other end of each through insulator via contacts the other metallization layer. The through insulator vias form at least one photonic crystal structure. A pair of the through insulator vias is separated along a first direction by a channel filled by the encapsulant. A width of the channel along the first direction is larger than a pitch of the photonic crystal structure along the first direction.
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公开(公告)号:US10818588B2
公开(公告)日:2020-10-27
申请号:US16262924
申请日:2019-01-31
发明人: Sen-Kuei Hsu , Hsin-Yu Pan , Yi-Che Chiang
IPC分类号: H01L23/10 , H01L23/34 , H01L23/522 , H01L23/31 , H01L23/36 , H01L23/00 , H01L23/528 , H01L21/48 , H01L21/56
摘要: A package structure includes a semiconductor die, an insulating encapsulant, a first redistribution layer, a second redistribution layer, a heat dissipation element and conductive balls. The insulating encapsulant is encapsulating the semiconductor die, and has a first surface and a second surface opposite to the first surface. The first redistribution layer is located on the first surface of the insulating encapsulant and includes at least one feed line and one ground plate. The second redistribution layer is located on the second surface of the insulating encapsulant and electrically connected to the semiconductor die and the first redistribution layer. The heat dissipation element is disposed on the first redistribution layer and includes a conductive base and antenna patterns, wherein the antenna patterns is electrically connected to the feed line and is electrically coupled to the ground plate of the first redistribution layer.
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公开(公告)号:US20200251414A1
公开(公告)日:2020-08-06
申请号:US16262924
申请日:2019-01-31
发明人: Sen-Kuei Hsu , Hsin-Yu Pan , Yi-Che Chiang
IPC分类号: H01L23/522 , H01L23/31 , H01L23/36 , H01L23/00 , H01L23/528 , H01L21/48 , H01L21/56
摘要: A package structure includes a semiconductor die, an insulating encapsulant, a first redistribution layer, a second redistribution layer, a heat dissipation element and conductive balls. The insulating encapsulant is encapsulating the semiconductor die, and has a first surface and a second surface opposite to the first surface. The first redistribution layer is located on the first surface of the insulating encapsulant and includes at least one feed line and one ground plate. The second redistribution layer is located on the second surface of the insulating encapsulant and electrically connected to the semiconductor die and the first redistribution layer. The heat dissipation element is disposed on the first redistribution layer and includes a conductive base and antenna patterns, wherein the antenna patterns is electrically connected to the feed line and is electrically coupled to the ground plate of the first redistribution layer.
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公开(公告)号:US10274518B2
公开(公告)日:2019-04-30
申请号:US15140758
申请日:2016-04-28
发明人: Mill-Jer Wang , Ching-Nen Peng , Hung-Chih Lin , Wei-Hsun Lin , Sen-Kuei Hsu , De-Jian Liu
摘要: A testing apparatus with reduced warping of the probe card and a method of reducing warping of a probe card of a testing apparatus are disclosed. The testing apparatus can include a testing head and a platform opposite the testing head, where the testing head and platform move relative to one another to bring a sample into contact with probing tips of the testing apparatus. The testing head can include a probe card printed circuit board, a stiffener, a discontinuous backer and a plurality of probing tips. The stiffener can be coupled to and reinforcing the probe card. The discontinuous backer can extend from the probe card to the stiffener, and can include at least one unfilled void extending from the stiffener to the probe card. The plurality of probing tips can extend from a distal end of the testing head.
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公开(公告)号:US20240136280A1
公开(公告)日:2024-04-25
申请号:US18401815
申请日:2024-01-02
发明人: Chao-Wen Shih , Chen-Hua Yu , Han-Ping Pu , Hsin-Yu Pan , Hao-Yi Tsai , Sen-Kuei Hsu
IPC分类号: H01L23/525 , H01L21/56 , H01L23/00 , H01L23/29 , H01L23/31 , H01L23/522 , H01L23/532 , H01L23/552
CPC分类号: H01L23/525 , H01L21/56 , H01L23/293 , H01L23/3192 , H01L23/5225 , H01L23/5329 , H01L23/552 , H01L24/03 , H01L24/05 , H01L24/06 , H01L24/11 , H01L24/14 , H01L23/5286 , H01L24/13
摘要: A method includes forming a dielectric layer over a contact pad of a device, forming a first polymer layer over the dielectric layer, forming a first conductive line and a first portion of a second conductive line over the first polymer layer, patterning a photoresist to form an opening over the first portion of the second conductive feature, wherein after patterning the photoresist the first conductive line remains covered by photoresist, forming a second portion of the second conductive line in the opening, wherein the second portion of the second conductive line physically contacts the first portion of the second conductive line, and forming a second polymer layer extending completely over the first conductive line and the second portion of the second conductive line.
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公开(公告)号:US11532576B2
公开(公告)日:2022-12-20
申请号:US16787020
申请日:2020-02-11
发明人: Sen-Kuei Hsu , Hsin-Yu Pan , Yi-Che Chiang
IPC分类号: H01L21/66 , H01L27/146 , H01L23/00 , G01R31/28
摘要: A manufacturing method of a semiconductor package includes the following steps. Semiconductor chips are disposed on a carrier. The semiconductor chips are grouped in a plurality of package units. The semiconductor chips are encapsulated in an encapsulant to form a reconstructed wafer. A redistribution structure is formed on the encapsulant. The redistribution structure electrically connects the semiconductor chips within a same package unit of the plurality of package units. The individual package units are separated by cutting through the reconstructed wafer along scribe line regions. In the reconstructed wafer, the plurality of package units are arranged so as to balance the number of scribe line regions extending across opposite halves of the reconstructed wafer in a first direction with respect to the number of scribe line regions extending across opposite halves of the reconstructed wafer in a second direction perpendicular to the first direction.
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公开(公告)号:US11373922B2
公开(公告)日:2022-06-28
申请号:US16993285
申请日:2020-08-14
发明人: Sen-Kuei Hsu , Ching-Feng Yang , Hsin-Yu Pan , Kai-Chiang Wu , Yi-Che Chiang
IPC分类号: H01L23/52 , H01L23/367 , H01L23/00 , H01L21/768 , H01L23/522 , H01L23/538
摘要: A semiconductor package includes a die, a dummy die, a plurality of conductive terminals, an insulating layer and a plurality of thermal through vias. The dummy die is disposed aside the die. The conductive terminals are disposed at a first side of the dummy die and the die and electrically connected to the dummy die and the die. The insulating layer is disposed at a second side opposite to the first side of the dummy die and the die. The thermal through vias penetrating through the insulating layer.
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公开(公告)号:US20210249372A1
公开(公告)日:2021-08-12
申请号:US16787020
申请日:2020-02-11
发明人: Sen-Kuei Hsu , Hsin-Yu Pan , Yi-Che Chiang
摘要: A manufacturing method of a semiconductor package includes the following steps. Semiconductor chips are disposed on a carrier. The semiconductor chips are grouped in a plurality of package units. The semiconductor chips are encapsulated in an encapsulant to form a reconstructed wafer. A redistribution structure is formed on the encapsulant. The redistribution structure electrically connects the semiconductor chips within a same package unit of the plurality of package units. The individual package units are separated by cutting through the reconstructed wafer along scribe line regions. In the reconstructed wafer, the plurality of package units are arranged so as to balance the number of scribe line regions extending across opposite halves of the reconstructed wafer in a first direction with respect to the number of scribe line regions extending across opposite halves of the reconstructed wafer in a second direction perpendicular to the first direction.
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公开(公告)号:US10818651B2
公开(公告)日:2020-10-27
申请号:US16260115
申请日:2019-01-29
发明人: Sen-Kuei Hsu , Hsin-Yu Pan , Ming-Hsien Tsai
IPC分类号: H01L25/18 , H01L23/538 , H01L23/522 , H01L23/00 , H01L23/36 , H01L23/31
摘要: A package structure includes an insulating encapsulation, a semiconductor die, and a filter structure. The semiconductor die is encapsulated in the insulating encapsulation. The filter structure is electrically coupled to the semiconductor die, wherein the filter structure includes a patterned metallization layer with a pattern having a double-spiral having aligned centroids thereof.
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