公开(公告)号：US12002799B2

公开(公告)日：2024-06-04

申请号：US17814766

申请日：2022-07-25

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Chen-Hua Yu ,  Hung-Yi Kuo ,  Chung-Shi Liu ,  Hao-Yi Tsai ,  Cheng-Chieh Hsieh ,  Tsung-Yuan Yu ,  Ming Hung Tseng

IPC分类号： H01L23/498 ,  H01L21/56 ,  H01L21/66 ,  H01L21/768 ,  H01L23/00 ,  H01L25/00 ,  H01L25/065 ,  H01L25/18

CPC分类号： H01L25/50 ,  H01L21/561 ,  H01L21/563 ,  H01L21/76898 ,  H01L22/14 ,  H01L22/32 ,  H01L24/03 ,  H01L24/16 ,  H01L24/17 ,  H01L24/81 ,  H01L25/0657 ,  H01L25/18 ,  H01L2224/0231 ,  H01L2224/02331 ,  H01L2224/02379 ,  H01L2224/13024 ,  H01L2224/16145 ,  H01L2224/17181 ,  H01L2225/06513 ,  H01L2225/06541

摘要： A method includes bonding a first device die to a second device die, encapsulating the first device die in a first encapsulant, performing a backside grinding process on the second device die to reveal through-vias in the second device die, and forming first electrical connectors on the second device die to form a package. The package includes the first device die and the second device die. The method further includes encapsulating the first package in a second encapsulant, and forming an interconnect structure overlapping the first package and the second encapsulant. The interconnect structure comprises second electrical connectors.

公开(公告)号：US20230245939A1

公开(公告)日：2023-08-03

申请号：US18297927

申请日：2023-04-10

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Tzu-Sung Huang ,  Ming Hung Tseng ,  Yen-Liang Lin ,  Hao-Yi Tsai ,  Chi-Ming Tsai ,  Chung-Shi Liu ,  Chih-Wei Lin ,  Ming-Che Ho

IPC分类号： H01L23/31 ,  H01L23/16 ,  H01L23/522 ,  H01L21/768 ,  H01L21/56 ,  H01L23/528

CPC分类号： H01L23/3157 ,  H01L23/16 ,  H01L23/5226 ,  H01L21/76843 ,  H01L21/56 ,  H01L21/76802 ,  H01L23/528

摘要： In an embodiment, a device includes: an integrated circuit die; an encapsulant at least partially surrounding the integrated circuit die, the encapsulant including fillers having an average diameter; a through via extending through the encapsulant, the through via having a lower portion of a constant width and an upper portion of a continuously decreasing width, a thickness of the upper portion being greater than the average diameter of the fillers; and a redistribution structure including: a dielectric layer on the through via, the encapsulant, and the integrated circuit die; and a metallization pattern having a via portion extending through the dielectric layer and a line portion extending along the dielectric layer, the metallization pattern being electrically coupled to the through via and the integrated circuit die.

公开(公告)号：US20210358870A1

公开(公告)日：2021-11-18

申请号：US17385222

申请日：2021-07-26

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Tzu-Sung Huang ,  Chen-Hua Yu ,  Hung-Yi Kuo ,  Hao-Yi Tsai ,  Ming Hung Tseng

IPC分类号： H01L23/64 ,  H01L21/48 ,  H01L21/56 ,  H01L23/485 ,  H01L23/552 ,  H01L49/02 ,  H01L21/683

摘要： In an embodiment, a device includes: a conductive shield on a first dielectric layer; a second dielectric layer on the first dielectric layer and the conductive shield, the first and second dielectric layers surrounding the conductive shield, the second dielectric layer including: a first portion disposed along an outer periphery of the conductive shield; a second portion extending through a center region of the conductive shield; and a third portion extending through a channel region of the conductive shield, the third portion connecting the first portion to the second portion; a coil on the second dielectric layer, the coil disposed over the conductive shield; an integrated circuit die on the second dielectric layer, the integrated circuit die disposed outside of the coil; and an encapsulant surrounding the coil and the integrated circuit die, top surfaces of the encapsulant, the integrated circuit die, and the coil being level.

公开(公告)号：US20200343181A1

公开(公告)日：2020-10-29

申请号：US16927681

申请日：2020-07-13

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Chen-Hua Yu ,  Chiang-Jui Chu ,  Chung-Shi Liu ,  Hao-Yi Tsai ,  Ming Hung Tseng ,  Hung-Yi Kuo

IPC分类号： H01L23/522 ,  H01L23/31 ,  H01L25/065 ,  H01L25/00 ,  H01L49/02 ,  H01L21/48 ,  H01L21/56 ,  H01L23/48 ,  H01L23/498 ,  H01L23/538 ,  H01L23/00 ,  H01L25/16 ,  H01L21/683

摘要： A package includes a device die, and an encapsulating material encapsulating the device die therein. The encapsulating material has a top surface coplanar with a top surface of the device die. A coil extends from the top surface to a bottom surface of the encapsulating material, and the device die is in the region encircled by the coil. At least one dielectric layer is formed over the encapsulating material and the coil. A plurality of redistribution lines is in the at least one dielectric layer. The coil is electrically coupled to the device die through the plurality of redistribution lines.

公开(公告)号：US20240312692A1

公开(公告)日：2024-09-19

申请号：US18674351

申请日：2024-05-24

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Tzu-Sung Huang ,  Chen-Hua Yu ,  Hao-Yi Tsai ,  Hung-Yi Kuo ,  Ming Hung Tseng

IPC分类号： H01F27/28 ,  H01F17/00 ,  H01F38/14 ,  H01F41/04 ,  H01F41/10 ,  H02J50/10 ,  H02J50/80

CPC分类号： H01F27/2804 ,  H01F38/14 ,  H01F41/041 ,  H01F41/10 ,  H01L28/10 ,  H02J50/10 ,  H02J50/80 ,  H01F2017/0086

摘要： Coil structures and methods of forming are provided. The coil structure includes a substrate. A plurality of coils is disposed over the substrate, each coil comprising a conductive element that forms a continuous spiral having a hexagonal shape in a plan view of the coil structure. The plurality of coils is arranged in a honeycomb pattern, and each conductive element is electrically connected to an external electrical circuit.

公开(公告)号：US11521959B2

公开(公告)日：2022-12-06

申请号：US16925032

申请日：2020-07-09

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Chen-Hua Yu ,  Hung-Yi Kuo ,  Chung-Shi Liu ,  Hao-Yi Tsai ,  Cheng-Chieh Hsieh ,  Tsung-Yuan Yu ,  Ming Hung Tseng

IPC分类号： H01L21/00 ,  H01L23/31 ,  H01L21/56 ,  H01L25/00 ,  H01L25/18 ,  H01L21/66 ,  H01L23/00 ,  H01L21/768 ,  H01L25/065

摘要： A method includes bonding a first device die to a second device die, encapsulating the first device die in a first encapsulant, performing a backside grinding process on the second device die to reveal through-vias in the second device die, and forming first electrical connectors on the second device die to form a package. The package includes the first device die and the second device die. The method further includes encapsulating the first package in a second encapsulant, and forming an interconnect structure overlapping the first package and the second encapsulant. The interconnect structure comprises second electrical connectors.

公开(公告)号：US11282785B2

公开(公告)日：2022-03-22

申请号：US16927681

申请日：2020-07-13

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Chen-Hua Yu ,  Chiang-Jui Chu ,  Chung-Shi Liu ,  Hao-Yi Tsai ,  Ming Hung Tseng ,  Hung-Yi Kuo

IPC分类号： H01L29/00 ,  H01L23/522 ,  H01L23/31 ,  H01L25/065 ,  H01L25/00 ,  H01L49/02 ,  H01L21/48 ,  H01L21/56 ,  H01L23/48 ,  H01L23/498 ,  H01L23/538 ,  H01L23/00 ,  H01L25/16 ,  H01L21/683

摘要： A package includes a device die, and an encapsulating material encapsulating the device die therein. The encapsulating material has a top surface coplanar with a top surface of the device die. A coil extends from the top surface to a bottom surface of the encapsulating material, and the device die is in the region encircled by the coil. At least one dielectric layer is formed over the encapsulating material and the coil. A plurality of redistribution lines is in the at least one dielectric layer. The coil is electrically coupled to the device die through the plurality of redistribution lines.

公开(公告)号：US20210225723A1

公开(公告)日：2021-07-22

申请号：US17201856

申请日：2021-03-15

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Tzu-Sung Huang ,  Ming Hung Tseng ,  Yen-Liang Lin ,  Hao-Yi Tsai ,  Chi-Ming Tsai ,  Chung-Shi Liu ,  Chih-Wei Lin ,  Ming-Che Ho

IPC分类号： H01L23/31 ,  H01L23/16 ,  H01L23/522 ,  H01L21/768 ,  H01L21/56 ,  H01L23/528

摘要： In an embodiment, a device includes: an integrated circuit die; an encapsulant at least partially surrounding the integrated circuit die, the encapsulant including fillers having an average diameter; a through via extending through the encapsulant, the through via having a lower portion of a constant width and an upper portion of a continuously decreasing width, a thickness of the upper portion being greater than the average diameter of the fillers; and a redistribution structure including: a dielectric layer on the through via, the encapsulant, and the integrated circuit die; and a metallization pattern having a via portion extending through the dielectric layer and a line portion extending along the dielectric layer, the metallization pattern being electrically coupled to the through via and the integrated circuit die.

公开(公告)号：US09053990B2

公开(公告)日：2015-06-09

申请号：US13660441

申请日：2012-10-25

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Chita Chuang ,  Yao-Chun Chuang ,  Yu-Chen Hsu ,  Ming Hung Tseng ,  Chen-Shien Chen

IPC分类号： H01L23/48 ,  H01L23/00

CPC分类号： H01L24/13 ,  H01L24/05 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/0401 ,  H01L2224/05567 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/13022 ,  H01L2224/13082 ,  H01L2224/13111 ,  H01L2224/13147 ,  H01L2224/16225 ,  H01L2224/16238 ,  H01L2224/81024 ,  H01L2224/81447 ,  H01L2224/81815 ,  H01L2224/81911 ,  H01L2924/00014 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/00 ,  H01L2924/01047 ,  H01L2924/0103 ,  H01L2924/01083 ,  H01L2924/01049 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01029 ,  H01L2924/01051 ,  H01L2224/05552

摘要： The disclosure is directed to a device and method for manufacture thereof. The device includes a first workpiece bonded to a second workpiece by a bump interconnection structure. The bump interconnection structure allows for optimized packaging assembly yield and bond integrity.

摘要翻译： 本公开涉及一种用于制造其的装置及其方法。 该装置包括通过凸块互连结构接合到第二工件的第一工件。 凸块互连结构允许优化的包装组装产量和粘合完整性。

公开(公告)号：US20140117532A1

公开(公告)日：2014-05-01

申请号：US13660441

申请日：2012-10-25

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

发明人： Chita Chuang ,  Yao-Chun Chuang ,  Yu-Chen Hsu ,  Ming Hung Tseng ,  Chen-Shien Chen

IPC分类号： H01L23/485 ,  H01L21/60

CPC分类号： H01L24/13 ,  H01L24/05 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/0401 ,  H01L2224/05567 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/13022 ,  H01L2224/13082 ,  H01L2224/13111 ,  H01L2224/13147 ,  H01L2224/16225 ,  H01L2224/16238 ,  H01L2224/81024 ,  H01L2224/81447 ,  H01L2224/81815 ,  H01L2224/81911 ,  H01L2924/00014 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/00 ,  H01L2924/01047 ,  H01L2924/0103 ,  H01L2924/01083 ,  H01L2924/01049 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01029 ,  H01L2924/01051 ,  H01L2224/05552

摘要： The disclosure is directed to a device and method for manufacture thereof. The device includes a first workpiece bonded to a second workpiece by a bump interconnection structure. The bump interconnection structure allows for optimized packaging assembly yield and bond integrity.

摘要翻译： 本公开涉及一种用于制造其的装置及其方法。 该装置包括通过凸块互连结构接合到第二工件的第一工件。 凸块互连结构允许优化的包装组装产量和粘合完整性。