Invention Application
- Patent Title: Redistribution Layer Layouts on Integrated Circuits and Methods for Manufacturing the Same
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Application No.: US17869196Application Date: 2022-07-20
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Publication No.: US20220359370A1Publication Date: 2022-11-10
- Inventor: Cheng-Yuan Li , Kuo-Cheng Lee , Yun-Wei Cheng , Yen-Liang Lin
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Main IPC: H01L23/528
- IPC: H01L23/528 ; H01L23/522 ; H01L23/00 ; H01L23/544

Abstract:
Exemplary embodiments for redistribution layers of integrated circuit components are disclosed. The redistribution layers of integrated circuit components of the present disclosure include one or more arrays of conductive contacts that are configured and arranged to allow a bonding wave to displace air between the redistribution layers during bonding. This configuration and arrangement of the one or more arrays minimize discontinuities, such as pockets of air to provide an example, between the redistribution layers during the bonding.
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Information query
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