Semiconductor device and method for forming a semiconductor device

    公开(公告)号:US10153339B2

    公开(公告)日:2018-12-11

    申请号:US15708209

    申请日:2017-09-19

    摘要: A semiconductor device includes a common doping region located within a semiconductor substrate of the semiconductor device. The common doping region includes a first portion. A maximal doping concentration within the first portion is higher than 1·1015 cm−3. The common doping region includes a second portion. A minimal doping concentration within the second portion is lower than 50% of the maximal doping concentration within the first portion of the common doping region. The common doping region includes a third portion. A minimal doping concentration within the third portion is more than 30% higher than the minimal doping concentration within the second portion. The second portion of the common doping region is located vertically between the first portion of the common doping region and the third portion of the common doping region.

    Laminar Structure, a Semiconductor Device and Methods for Forming Semiconductor Devices
    47.
    发明申请
    Laminar Structure, a Semiconductor Device and Methods for Forming Semiconductor Devices 审中-公开
    层状结构,半导体器件和用于形成半导体器件的方法

    公开(公告)号:US20160372393A1

    公开(公告)日:2016-12-22

    申请号:US15182983

    申请日:2016-06-15

    摘要: A method for forming semiconductor devices includes placing a laminar structure having electrically insulating material arranged between a plurality of electrically conductive structures onto a surface of a semiconductor wafer comprising a plurality of semiconductor device structures. An electrically conductive structure of the plurality of electrically conductive structures is located adjacent to a semiconductor device structure of the plurality of semiconductor device structures. Each electrically conductive structure of the plurality of electrically conductive structures extends from a first surface of the laminar structure towards a second opposite surface of the laminar structure.

    摘要翻译: 一种用于形成半导体器件的方法包括将具有布置在多个导电结构之间的电绝缘材料的层状结构放置在包括多个半导体器件结构的半导体晶片的表面上。 多个导电结构的导电结构位于多个半导体器件结构的半导体器件结构附近。 多个导电结构的每个导电结构从层状结构的第一表面延伸到层状结构的第二相对表面。