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公开(公告)号：US20230176410A1
公开(公告)日：2023-06-08
申请号：US16963787
申请日：2020-06-23
Inventor： Dewei SONG , Fei AI
IPC: G02F1/1333 , G02F1/1368 , H01L27/12
CPC classification number: G02F1/133354 , G02F1/1368 , H01L27/1248
Abstract: The present application provides a display panel and a display device. The display panel includes an array substrate, a color filter substrate, and a colloid layer. The array substrate includes a thin film transistor layer and a passivation layer. The passivation layer includes at least one first connection element. The color filter substrate is disposed opposite to the array substrate. The colloid layer is arranged between the passivation layer and the color filter substrate, the colloid layer is connected to the first connection element, and the colloid layer and the first connection element couple the array substrate to the color filter substrate.
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公开(公告)号：US20230163136A1
公开(公告)日：2023-05-25
申请号：US16966119
申请日：2020-04-20
Inventor： Juncheng XIAO , Yong XU , Fei AI , Dewei SONG
IPC: H01L27/12
CPC classification number: H01L27/1225 , H01L27/1288 , H01L27/1285
Abstract: A display panel, an array substrate, and a manufacturing method thereof, wherein the array substrate includes a thin film transistor device, and an interface layer, a first transparent conductive layer, a passivation layer, and a second transparent conductive layer which are formed on the thin film transistor device in sequence. By replacing a planarization layer in the prior art with the interface layer, performing a gate re-etching process, and perforating the interface layer and the passivation layer to simultaneously form a deep via and a shallow via, a number of photomasks required to form the array substrate is reduced to 8. It effectively reduces costs of production materials and costs of photomasks.
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公开(公告)号：US20210408080A1
公开(公告)日：2021-12-30
申请号：US16757175
申请日：2019-12-12
Inventor： Fei AI , Dewei SONG
IPC: H01L27/12 , G02F1/1368 , G02F1/1343 , G02F1/136
Abstract: The invention provides a thin film transistor (TFT) array substrate, a manufacturing method thereof, and a display panel. The TFT array substrate includes a substrate. A buffer layer and a TFT functional layer are sequentially disposed on the substrate. The TFT functional layer includes an active layer (Active), a gate insulating layer (GI), a gate layer (GE), an interlayer insulating layer (ILD), and a source-drain layer (SD) that are sequentially disposed on the buffer layer. An inorganic insulating layer is disposed on the source-drain layer, and a backside indium tin oxide (BITO) layer, a passivation layer (PV), and a top indium tin oxide (TITO) layer are sequentially disposed on the inorganic insulating layer. The invention provides the TFT array substrate. The TFT array substrate adopts a new functional layer structure design, which can effectively reduce production cost and cycle time of the TFT array substrate.
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公开(公告)号：US20250089368A1
公开(公告)日：2025-03-13
申请号：US18567964
申请日：2023-09-26
Inventor： Huihui ZHAO , Chunpeng ZHANG , Fei AI , Jianfeng YUAN , Zhifu LI
IPC: H01L27/12 , H01L29/66 , H01L29/786
Abstract: A semiconductor device, a display panel, and a chip are provided in embodiments of the present application. The semiconductor device of the embodiments of the present application stacks a first conductor portion, a channel portion, and a second conductor portion to form a vertical active structure layer to realize a narrow channel. A growth direction of crystal grains arranged in the channel potion is consistent with a moving direction of carriers to provide a single crystal-like channel.
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公开(公告)号：US20250076722A1
公开(公告)日：2025-03-06
申请号：US18951716
申请日：2024-11-19
Inventor： Jiyue SONG , Fei AI
IPC: G02F1/1368 , G02F1/133 , H01L27/12
Abstract: A display panel includes an array substrate. The array substrate includes: a thin-film transistor (TFT) device, the TFT device including a first active pattern; and a photosensitive device, the photosensitive device including a first electrode, a second electrode, a connector electrode, and a second active pattern. The first electrode, the second electrode, the connector electrode, and the second active pattern constitute a vertical heterojunction structure.
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Patent Agency Ranking
公开(公告)号：US20250072093A1
公开(公告)日：2025-02-27
申请号：US17925002
申请日：2022-11-07
Inventor： Zhifu LI , Guanghui LIU , Fei AI , Dewei SONG , Zhuang LI
IPC: H01L29/45 , H01L29/49 , H01L29/786
Abstract: A display panel is provided. The display panel includes a substrate and includes a first ohmic contact structure, a first boss, a second ohmic contact structure, a semiconductor structure, and a gate which are stacked on the substrate. The first boss includes at least one sidewall. By arranging the semiconductor structure on the sidewall of the first boss, a length of a channel can be shortened by using an existing technology, and a dimension of a thin film transistor can be reduced, so that an integration level of the thin film transistor in the display panel can be improved.
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公开(公告)号：US20240194792A1
公开(公告)日：2024-06-13
申请号：US18086890
申请日：2022-12-22
Inventor： Zhifu LI , Guanghui LIU , Fei AI , Dewei SONG , Zhuang LI
IPC: H01L29/786 , H01L29/417
CPC classification number: H01L29/78696 , H01L29/41733
Abstract: The present application provides a thin film transistor substrate and an electronic device. The thin film transistor substrate includes: a substrate; a boss including an undercut structure, the undercut structure is located on a side wall of the boss; a filler located in the undercut structure; and an active layer located on the boss and the substrate, the active layer includes a channel, and the channel covers the undercut structure and the filler.
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公开(公告)号：US20240094587A1
公开(公告)日：2024-03-21
申请号：US17976805
申请日：2022-10-30
IPC: G02F1/1368 , G02F1/1362 , H01L27/32
CPC classification number: G02F1/1368 , G02F1/136286 , H01L27/3276
Abstract: The present disclosure provides a display panel and a display device. The display panel includes a thin film transistor; and further includes a substrate,; a first metal layer disposed on the substrate and including a gate of the thin film transistor; an active layer disposed on a side of the first metal layer away from the substrate and including an active portion of the thin film transistor; a spacer layer disposed on a side of the active layer away from the first metal layer and including a plurality of contact holes; a second metal layer disposed on a side of the spacer layer away from the active layer and including a source and a drain of the thin film transistor; an orthographic projection of the gate electrode on the substrate covers an orthographic projection of at least part of the contact holes on the substrate.
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公开(公告)号：US20240038765A1
公开(公告)日：2024-02-01
申请号：US17621257
申请日：2021-12-09
Inventor： Fei AI , Dewei SONG , Chengzhi LUO
IPC: H01L27/12 , G02F1/1362
CPC classification number: H01L27/1218 , G02F1/136227 , H01L27/124
Abstract: An array substrate and a display panel are provided. The array substrate includes a substrate, an array layer, an inorganic insulation layer, a conductive electrode, a passivation layer, and a pixel electrode disposed in sequence. The array layer includes a source electrode and a drain electrode. A first via hole is defined in the array substrate. The first via hole penetrates the passivation layer and the inorganic insulation layer and exposes the drain electrode. The pixel electrode is connected to the drain electrode in the first via hole.
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公开(公告)号：US20240038130A1
公开(公告)日：2024-02-01
申请号：US17430058
申请日：2021-06-08
Inventor： Chao TIAN , Yanqing GUAN , Guanghui LIU , Fei AI
IPC: G09G3/20
CPC classification number: G09G3/2092 , G09G2310/0267 , G09G2300/043
Abstract: The present application provides a display panel and a display device. An N-th auxiliary unit is arranged in a display area of the display panel. An output end of the N-th auxiliary unit is connected to an N-th scan line. By connecting the auxiliary unit arranged in the display area to the corresponding scan line, a falling edge of a scan signal transmitted in the scan line can have sharp falling or a rising edge of the scan signal can have sharp rising, which can alleviate a signal distortion problem caused by transmission delay in the display area.
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