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公开(公告)号:US20240030228A1
公开(公告)日:2024-01-25
申请号:US17600143
申请日:2021-09-13
IPC: H01L27/12
CPC classification number: H01L27/124
Abstract: An array substrate and a display panel are disclosed. The array substrate includes an underlay, a seed layer disposed on one side of the underlay, and a first metal layer disposed on one side of the seed layer and away from the underlay, wherein the first metal layer directly contacts the seed layer. The present application utilizes the seed layer directly contacting the first metal layer to induce crystallization of the first metal layer, so that the first metal layer is formed with larger grains, fewer grain boundaries and less charge carrier scattering, and a resistivity of the first metal layer is decreased.
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公开(公告)号:US20240094587A1
公开(公告)日:2024-03-21
申请号:US17976805
申请日:2022-10-30
IPC: G02F1/1368 , G02F1/1362 , H01L27/32
CPC classification number: G02F1/1368 , G02F1/136286 , H01L27/3276
Abstract: The present disclosure provides a display panel and a display device. The display panel includes a thin film transistor; and further includes a substrate,; a first metal layer disposed on the substrate and including a gate of the thin film transistor; an active layer disposed on a side of the first metal layer away from the substrate and including an active portion of the thin film transistor; a spacer layer disposed on a side of the active layer away from the first metal layer and including a plurality of contact holes; a second metal layer disposed on a side of the spacer layer away from the active layer and including a source and a drain of the thin film transistor; an orthographic projection of the gate electrode on the substrate covers an orthographic projection of at least part of the contact holes on the substrate.
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