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公开(公告)号：US20250098307A1
公开(公告)日：2025-03-20
申请号：US18567221
申请日：2023-09-26
Inventor： Haiming CAO , Chao TIAN , Shiyu LONG , Chunpeng ZHANG , Fei AI , Chungching HSIEH , Jianfeng YUAN
IPC: H01L27/12 , G02F1/1368 , H01L29/786
Abstract: An array substrate, a display panel, and a display device are provided. The array substrate includes a base; a buffer layer and a thin film transistor. The buffer layer is provided on the base and includes a first buffer layer and a second buffer layer. The first buffer layer is disposed between the second buffer layer and the base. A refractive index of the first buffer layer is greater than a refractive index of the base and a refractive index of the second buffer layer. A ratio of the refractive index of the first buffer layer to the refractive index of the base is less than or equal to 1.25. The thin film transistor is provided on a side of the buffer layer away from the base.
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公开(公告)号：US20250087124A1
公开(公告)日：2025-03-13
申请号：US18249250
申请日：2023-02-28
Inventor： Mingyue LI , Chao TIAN , Fei AI
Abstract: The present application discloses a display panel, the display panel includes an active area and a irregular-shaped area, the active area includes a first active area disposed at at least one side of the irregular-shaped area and a second active area connected with the first active area. The first signal line is disposed in the second active area, the second signal line is disposed in the first active area, the first signal line and the second signal line extend in a same direction, and the length of the first signal line is larger than the length of the second signal line, and at least one of a plurality of the compensation units is connected with the second signal line.
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公开(公告)号：US20240297174A1
公开(公告)日：2024-09-05
申请号：US17293332
申请日：2021-03-31
Inventor： Xuebin YUAN , Yanqing GUAN , Congxing YANG , Chao TIAN , Fuhsiung TANG
IPC: H01L27/12
CPC classification number: H01L27/124
Abstract: The present application provides an array substrate, a display panel, and a display device. In the present application, a plurality of first-type data lines and a plurality of second-type data lines with data voltages of opposite polarities are provided, and a light-shielding layer of each of first sub-pixels is at least electrically connected to a light-shielding layer of one of second sub-pixels through a connecting line, which can effectively reduce a change in pixel brightness caused by capacitive coupling, and relieve a problem of image flicker.
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公开(公告)号：US20240055535A1
公开(公告)日：2024-02-15
申请号：US17598275
申请日：2021-08-06
Inventor： Hong CHENG , Chao TIAN , Yanqing GUAN , Guanghui LIU
IPC: H01L29/786 , H01L29/423
CPC classification number: H01L29/78696 , H01L29/42384 , G02F1/1368
Abstract: A thin film transistor and a display panel are provided. A first dimension of a first transmission portion electrically connected to a source heavily-doped portion is different from a second dimension of a second transmission portion electrically connected to a drain heavily-doped portion, so that an intensity of an electric field of carriers transmitted by the transmission portion corresponding to the larger one of the first dimension or the second dimension is smaller when the thin film transistor is turned on, thereby reducing the bombardment effect of the carriers on a source or a drain and improving the stability of thin film transistor.
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公开(公告)号：US20240029609A1
公开(公告)日：2024-01-25
申请号：US17441303
申请日：2021-08-06
Inventor： Haiming CAO , Chao TIAN , Yanqing GUAN , Fei AI , Guanghui LIU
IPC: G09G3/20
CPC classification number: G09G3/20 , G09G2310/0267 , G09G2310/08 , G09G2320/045
Abstract: A gate drive circuit and a display panel are provided. A pull-up module and a pull-down module of the gate drive circuit output a constant-voltage high potential to a second node, a third node, and a n-th stage gate drive signal through a P-type thin film transistor and output constant-voltage low potential through a N-type thin film transistor to the second node, the third node, and an n-th gate drive signal, thereby improving the stability of the output signal of the thin film transistor connected to the gate drive circuit and the key node.
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Patent Agency Ranking
公开(公告)号：US20230309342A1
公开(公告)日：2023-09-28
申请号：US17771484
申请日：2022-04-13
Inventor： Hong CHENG , Yanqing GUAN , Chao TIAN , Fei AI , Guanghui LIU
CPC classification number: H01L27/3262 , G09G3/32 , H01L27/3265 , G09G2300/0426 , G09G2300/0842 , G09G2300/0861 , G09G2320/0233 , G09G2320/0242 , H01L27/1225
Abstract: A display panel, a pixel driving circuit, and a display device are provided. Driving transistors include a first transistor and a second transistor connected in parallel. An absolute value of a threshold voltage of the first transistor is greater than an absolute value of a threshold voltage of the second transistor. A carrier mobility of the first transistor is greater than a carrier mobility of the second transistor. A driving current is affected by characteristics of the second transistor and an increase speed is slowed down, which improves a problem of color unevenness of the display panel at low brightness.
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公开(公告)号：US20210225891A1
公开(公告)日：2021-07-22
申请号：US16097891
申请日：2018-08-01
Inventor： Juncheng XIAO , Chao TIAN
IPC: H01L27/12 , H01L21/8234 , H01L29/786
Abstract: The present disclosure provides an array substrate and a method for manufacturing the same. The method includes providing a substrate, and forming a polysilicon layer, a gate insulating layer, a second buffer layer, a patterned second metal layer, and a third buffer layer on the substrate in turn; forming a through-hole by a mask process, wherein the through-hole passes through the passivation layer, the third buffer layer, the second buffer layer, and the gate insulating layer to contact the polysilicon layer.
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公开(公告)号：US20210225311A1
公开(公告)日：2021-07-22
申请号：US16302678
申请日：2018-08-16
Inventor： Xin ZHANG , Juncheng XIAO , Chao TIAN , Yanqing GUAN
IPC: G09G3/36
Abstract: A gate driver on array (GOA) circuit, a liquid crystal panel comprising the GOA circuit, and a display device including the liquid crystal panel are provided. The GOA circuit comprises a forward and backward scanning control module configured to control the GOA circuit to perform forward scan or backward scan according to a forward scanning signal or a backward scanning signal respectively, a first voltage stabilizing module configured to maintain a voltage level of a first node, and a second voltage stabilizing module electrically connecting to the forward and backward scanning control module, and configured to maintain a voltage level of an output signal of the forward and backward scanning control module.
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公开(公告)号：US20200226994A1
公开(公告)日：2020-07-16
申请号：US16349625
申请日：2018-10-10
Inventor： Xin ZHANG , Junchen XIAO , Yanqing GUAN , Chao TIAN
IPC: G09G3/36
Abstract: A gate driver of array (GOA) circuit and a display device are disclosed. An n-th sub-circuit in the GOA circuit includes a control module, an output module, a pull-up supplement module, and a leakage switch. The pull-up supplement module includes a supplement switch and an auxiliary switch. The supplement switch is coupled to the auxiliary switch, the control module, and the output module. The auxiliary switch is coupled to the supplement switch, the control module, and the output module. The leakage switch is coupled to the control module, the output module, the supplement switch, and the auxiliary switch.
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公开(公告)号：US20250148960A1
公开(公告)日：2025-05-08
申请号：US18567500
申请日：2023-11-13
Abstract: The present application provides a display panel and a display device. Pulse width modulation modules of a plurality of sub-pixels included in the same sub-pixel group receive the same frequency sweep signal, and pulse width modulation modules and the pulse amplitude modulation modules of the plurality of sub-pixels included in the same sub-pixel group receive the same light emission control signal. The start time when pixel driving circuits of at least two of the sub-pixel groups provide flow paths for corresponding driving currents according to corresponding light emission control signals is different.
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