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公开(公告)号：US20250081522A1
公开(公告)日：2025-03-06
申请号：US18560932
申请日：2023-06-29
Inventor： Zhifu LI , Guanghui LIU , Fei AI , Dewei SONG , Chengzhi LUO
IPC: H01L29/786 , H01L29/10
Abstract: The present application provides a thin film transistor and an electronic device thereof. An active layer of the thin film transistor includes: a first active layer, a channel layer and a second active layer that are stacked, the first active layer includes a first doped portion and a second doped portion, the first doped portion is connected to the channel layer and the second doped portion, and a concentration of dopant ions in the first doped portion is less than a concentration of dopant ions in the second doped portion. The leakage current is reduced, and the mobility in the “channel region” of the thin film transistor is improved.
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公开(公告)号：US20240405003A1
公开(公告)日：2024-12-05
申请号：US18798719
申请日：2024-08-08
Inventor： Guowei ZHA , Jianfeng YUAN , Zhifu LI
IPC: H01L25/075 , G06V40/13
Abstract: The present application provides a display panel and a display device. The display panel includes a plurality of pixel units, wherein each of the pixel units includes a sub-pixel, the sub-pixel includes a first micro-LED chip, and in a top view, a gap is provided between adjacent ones of the first micro-LED chips; and a functional element disposed at the gap, wherein a function of the functional element is different from a display function of the sub-pixel, in order to improve integration of the display panel, increase an added value of the display panel, and save a space of the whole machine.
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公开(公告)号：US20240363758A1
公开(公告)日：2024-10-31
申请号：US18247554
申请日：2023-02-28
Inventor： Zhifu LI , Guanghui LIU , Chao DAI , Fei AI , Dewei SONG , Zhuang LI
IPC: H01L29/786 , H01L29/417
CPC classification number: H01L29/78603 , H01L29/41733 , H01L29/78633 , H01L29/78696
Abstract: A display panel is provided by embodiments of the present application, a thin film transistor includes: a first gate electrode including a first side slope, a second side slope oppositely arranged, and a top surface; a first gate insulating layer covering the first gate electrode; a semiconductor layer arranged on the first gate insulating layer, wherein the semiconductor layer includes a first end, a second end, and a channel arranged between the first end and the second end, the second end is at least partially on the top surface, the channel is at least partially located on the first side slope.
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公开(公告)号：US20220321747A1
公开(公告)日：2022-10-06
申请号：US16761271
申请日：2020-04-03
Inventor： Shaojun HOU , Xindong MEI , Chao WANG , Guanghui LIU , Zhifu LI
IPC: H04N5/225 , G02F1/1335 , G03B13/34
Abstract: The present invention discloses a display device including an optical film including a through hole; a display panel disposed on a surface of one side of the optical film, wherein the display panel includes a transparent area corresponding to the through hole; a camera including a camera lens, wherein the camera is inserted into the through hole and faces the transparent area; and a plurality of LED chips evenly arranged around the camera lens, wherein the LED chips are disposed in the through hole and between the camera and the transparent area.
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公开(公告)号：US20250142963A1
公开(公告)日：2025-05-01
申请号：US18524299
申请日：2023-11-30
Inventor： Zhuang LI , Chunpeng ZHANG , Fei AI , Jianfeng YUAN , Zhifu LI
IPC: H01L27/12
Abstract: An array substrate and a display panel are provided, which include a base and a plurality of semiconductor devices disposed on the base. An active defining portion is provided on the base, a junction of a connecting surface and a first top surface of the active defining portion is a first edge. The semiconductor device includes an active layer and a gate, one or more single crystal starting points of the active layer correspond to the first edge. An area where two rows of single crystal particles parallel to the first edge on both sides of the one or more single crystal starting points is a single crystal area, the channel portion of the active layer is disposed in the single crystal area, and the gate is provided with in a direction perpendicular to the base and covers only one row of the two rows of single crystal particles.
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Patent Agency Ranking
公开(公告)号：US20250089363A1
公开(公告)日：2025-03-13
申请号：US18289033
申请日：2023-06-29
Inventor： Zhifu LI , Guanghui LIU , Fei AI , Chengzhi LUO
IPC: H01L27/12 , H01L29/66 , H01L29/786
Abstract: The present disclosure provides semiconductor devices. A first active layer is disposed on a substrate. A first insulation layer covers the first active layer and is provided with a first via hole. A second active layer is disposed on the first insulation layer. A third active layer is disposed in the first via hole and connects the first active layer and the second active layer, so that a channel length of the semiconductor device is determined by a thickness of the first insulation layer, and a channel width of the semiconductor device is determined by a circumference of the first via hole.
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公开(公告)号：US20240288620A1
公开(公告)日：2024-08-29
申请号：US18660360
申请日：2024-05-10
Inventor： Dong TIAN , Gege ZHOU , Wei ZHOU , Jianfeng YUAN , Zhifu LI
IPC: F21V8/00
CPC classification number: G02B6/0031
Abstract: A backlight module and a display panel are provided. The display panel includes a display panel main body and a backlight module. The backlight module includes a light guide, a first reflector, and a light source. By arranging the light source in a receiving cavity of the light guide, a width of a lamp socket of the backlight module is reduced, and a light effect of the lamp socket of the backlight module is improved.
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公开(公告)号：US20240234577A1
公开(公告)日：2024-07-11
申请号：US17926189
申请日：2022-11-11
Inventor： Zhifu LI , Guanghui LIU , Chao DAI , Fei AI , Dewei SONG , Chengzhi LUO
IPC: H01L29/786 , H01L29/417 , H01L29/423
CPC classification number: H01L29/78642 , H01L29/41733 , H01L29/41741 , H01L29/42392
Abstract: A semiconductor device and an electronic device are provided. A through hole is formed in an insulating layer and located on a first active layer. A thin-film transistor layer includes a third active layer. At least part of the third active layer is located on a sidewall of the through hole. One side of the third active layer is connected to a first active layer, and the other side of the third active layer is connected to a second active layer, so that a channel length is reduced, short channel effect is reduced, on-state current is increased, and power consumption is reduced.
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公开(公告)号：US20240222379A1
公开(公告)日：2024-07-04
申请号：US17998999
申请日：2022-11-07
Inventor： Zhifu LI , Guanghui LIU , Fei Al , Dewei Song
IPC: H01L27/12
CPC classification number: H01L27/1222
Abstract: Embodiments of the present disclosure provide an array substrate and a display panel. The array substrate includes a first active layer, a gate electrode, a gate insulating layer, a second active layer, and a source/drain metal layer. The first active layer is connected in parallel with the second active layer through a conductor layer. Through an active layer structure with two layers in parallel, an on-state current and mobility of equivalent carriers of a device are effectively improved, and a comprehensive performance of the device is improved.
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公开(公告)号：US20240194684A1
公开(公告)日：2024-06-13
申请号：US17802166
申请日：2022-08-08
Inventor： Zhifu LI , Guanghui LIU , Fei AI , Dewei SONG
IPC: H01L27/12 , H01L29/786
CPC classification number: H01L27/1222 , H01L29/78633 , H01L29/78696
Abstract: A semiconductor device and an electronic device are provided. The semiconductor device includes an insulating substrate and a thin film transistor layer. The thin film transistor layer includes a first active layer and a first insulating layer disposed on the first active layer, and a convex portion is formed on the first insulating layer. The thin film transistor layer further includes a second active layer and a third active layer disposed on both sidewalls and an upper surface of the convex portion, one end of the first active layer is connected to the second active layer, and another end of the first active layer is connected to the third active layer.
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