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公开(公告)号:US10991669B2
公开(公告)日:2021-04-27
申请号:US15238454
申请日:2016-08-16
Applicant: MediaTek Inc.
Inventor: Che-Ya Chou , Wen-Sung Hsu , Nan-Cheng Chen
IPC: H01L23/00 , H01L23/31 , H01L23/498 , H01L23/367 , H01L25/065 , H05K1/11 , H05K3/34
Abstract: A semiconductor package is provided. The semiconductor package includes a semiconductor device bonded to a base through a first conductive structure. The semiconductor device includes a carrier substrate including a conductive trace. A portion of the conductive trace is elongated. The semiconductor device also includes a second conductive structure above the carrier substrate. A portion of the second conductive structure is in contact with the portion of the conductive trace. The semiconductor device further includes a semiconductor body mounted above the conductive trace. The semiconductor body is connected to the second conductive structure.
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公开(公告)号:US10784206B2
公开(公告)日:2020-09-22
申请号:US16163614
申请日:2018-10-18
Applicant: MEDIATEK Inc.
Inventor: Wen-Sung Hsu , Tao Cheng , Nan-Cheng Chen , Che-Ya Chou , Wen-Chou Wu , Yen-Ju Lu , Chih-Ming Hung , Wei-Hsiu Hsu
IPC: H01L23/538 , H01L21/683 , H01Q9/04 , H01L23/498 , H01Q1/22 , H01L23/31 , H01L25/10 , H01L23/50 , H01Q21/06 , H01L23/00 , H01L21/48 , H01L21/56 , H01L25/00 , H01L25/065 , H01L25/16 , H01L23/66 , H01L23/14
Abstract: A semiconductor package includes a first substrate, a first layer structure, a second layer structure and a first antenna layer. The first antenna layer is formed on at least one of the first layer structure and the second layer structure. The first layer structure is formed between the first substrate and the second layer structure.
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33.
公开(公告)号:US10515887B2
公开(公告)日:2019-12-24
申请号:US15700220
申请日:2017-09-11
Applicant: MEDIATEK INC.
Inventor: Shih-Yi Syu , Chia-Yu Jin , Che-Ya Chou , Wen-Sung Hsu , Nan-Cheng Chen
IPC: H01L23/498 , H01L25/065 , H01L21/56 , H01L23/31 , H01L23/42 , H01L23/64 , H01L23/367 , H01L23/433 , H01L21/48 , H01L23/00
Abstract: A semiconductor package structure is provided. The semiconductor package structure includes a first carrier substrate having a first surface and an opposing second surface. A second carrier substrate is stacked on the first carrier substrate and has a first surface and an opposing second surface that faces the first surface of the first carrier substrate. A semiconductor die is mounted on the first surface of the second carrier substrate. A heat spreader is disposed on the first surface of the first carrier substrate to cover and surround the second carrier substrate and the semiconductor die. A method for forming the semiconductor package structure is also provided.
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公开(公告)号:US20180358685A1
公开(公告)日:2018-12-13
申请号:US15974700
申请日:2018-05-09
Applicant: MEDIATEK INC.
Inventor: Fu-Yi Han , Che-Ya Chou , Che-Hung Kuo , Wen-Chou Wu , Nan-Cheng Chen
IPC: H01Q1/22 , H01L23/498 , H01L23/538 , H01L23/00
CPC classification number: H01L23/66 , H01L2223/6616 , H01L2223/6677 , H01L2224/04105 , H01L2224/12105 , H01L2224/13144 , H01L2224/13147 , H01L2224/16227 , H01L2224/48227 , H01L2225/1023 , H01L2225/1035 , H01L2225/1058 , H01L2924/15192 , H01L2924/15311 , H01L2924/15321
Abstract: One embodiment of the present disclosure provides a semiconductor package including a bottom chip package having a first side and a second side opposing the first side, and a top antenna package mounted on the first side of the bottom chip package. The bottom chip package further includes a semiconductor chip. The semiconductor chip may include a RFIC chip. The top antenna package has at least one radiative antenna element.
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公开(公告)号:US20180102298A1
公开(公告)日:2018-04-12
申请号:US15722315
申请日:2017-10-02
Applicant: MEDIATEK INC.
Inventor: Nan-Cheng Chen , Che-Ya Chou , Hsing-Chih Liu , Che-Hung Kuo
IPC: H01L23/31 , H01L23/48 , H01L25/04 , H01L23/482
CPC classification number: H01L23/31 , H01L23/145 , H01L23/147 , H01L23/3128 , H01L23/3135 , H01L23/481 , H01L23/4824 , H01L23/5383 , H01L23/5384 , H01L23/5389 , H01L24/20 , H01L25/043 , H01L25/0652 , H01L25/0655 , H01L25/18 , H01L2224/04105 , H01L2224/12105 , H01L2224/131 , H01L2224/16227 , H01L2224/16235 , H01L2224/2518 , H01L2224/32225 , H01L2224/73204 , H01L2224/92125 , H01L2225/06541 , H01L2225/1035 , H01L2225/1041 , H01L2225/1058 , H01L2924/10253 , H01L2924/1434 , H01L2924/15311 , H01L2924/157 , H01L2924/014 , H01L2924/00014
Abstract: A semiconductor device includes a substrate, a body structure and an electronic component. The body structure is disposed above the substrate and includes a semiconductor die, a molding compound, a conductive component and a lower redistribution layer (RDL). The semiconductor die has an active surface. The molding compound encapsulates the semiconductor die and has a lower surface, an upper surface opposite to the lower surface and a through hole extending to the upper surface from the lower surface. The conductive component is formed within the through hole. The lower RDL is formed on the lower surface of the molding compound, the active surface of the semiconductor die and the conductive component exposed from the lower surface. The electronic component is disposed above the upper surface of the molding compound and electrically connected to the lower RDL through the conductive component.
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36.
公开(公告)号:US20180053665A1
公开(公告)日:2018-02-22
申请号:US15623361
申请日:2017-06-14
Applicant: MEDIATEK INC.
Inventor: Che-Hung Kuo , Che-Ya Chou , Nan-Cheng Chen
IPC: H01L21/48 , H01L23/00 , H01L21/56 , H01L23/498 , H01L23/50
Abstract: A pre-bumped redistribution layer (RDL) structure is disclosed. The pre-bumped RDL structure includes at least a dielectric layer, a first metal layer on the first surface, a second metal layer on the second surface, and a via layer electrically connecting the first metal layer and the second metal layer. At least a bump pad is formed in the first metal layer. A bump is disposed on the bump pad. The bump comprises a copper layer with its lower end directly jointed to a top surface of the bump pad.
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公开(公告)号:US09704792B2
公开(公告)日:2017-07-11
申请号:US15048807
申请日:2016-02-19
Applicant: MediaTek Inc.
Inventor: Tung-Hsien Hsieh , Che-Ya Chou
IPC: H01L23/31 , H01L23/498 , H01L23/00 , H01L25/10
CPC classification number: H01L23/49822 , H01L23/3128 , H01L23/49811 , H01L24/16 , H01L25/105 , H01L2224/0401 , H01L2224/16227 , H01L2225/1023 , H01L2225/1058 , H01L2225/1088 , H01L2924/1431 , H01L2924/1432 , H01L2924/1436 , H01L2924/15331 , H01L2924/1815
Abstract: The invention provides a semiconductor package assembly. The semiconductor package assembly includes a redistribution layer (RDL) structure die-attach surface and a bump-attach surface opposite the die-attach surface. A semiconductor die is mounted on the die-attach surface of the redistribution layer (RDL) structure. A first solder mask layer is disposed on the die-attach surface. The first solder mask layer surrounds the semiconductor die. An additional circuit structure is disposed on a portion of the first solder mask, surrounding the semiconductor die. The additional circuit structure includes a pad portion having a first width and a via portion has a second width that is less than the first width. The via portion passes through the first solder mask layer to be coupled the redistribution layer (RDL) structure.
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