CHIP SCALE PACKAGE STRUCTURE AND METHOD OF FORMING THE SAME

    公开(公告)号:US20230073399A1

    公开(公告)日:2023-03-09

    申请号:US17989498

    申请日:2022-11-17

    Applicant: MediaTek Inc.

    Abstract: A semiconductor package structure includes a semiconductor die, a redistribution layer (RDL) structure, a protective insulating layer, and a conductive structure. The semiconductor die has a first surface, a second surface opposite the first surface, and a third surface adjoined between the first surface and the second surface. The RDL structure is on the first surface of the semiconductor die and is electrically coupled to the semiconductor die. The protective insulating layer covers the RDL structure, the second surface and the third surface of the semiconductor die. The conductive structure passes through the protective insulating layer and is electrically coupled to the RDL structure.

    GRAPHICS FUSION TECHNOLOGY SCENE DETECTION AND RESOLUTION CONTROLLER

    公开(公告)号:US20230025347A1

    公开(公告)日:2023-01-26

    申请号:US17849473

    申请日:2022-06-24

    Applicant: MediaTek Inc.

    Abstract: Disclosed are embodiments of a graphics scene detection technique that provides an adaptive scale factor dependent on an image quality, such that certain images may be downscaled prior to being displayed to preserve system resources without significantly affecting image quality for a user. The inventors recognized and appreciated that certain images may be presented at a lower resolution to a user without being perceived as lower image quality. Some aspects provide a scene detection module that determines a quality score from a graphic command output for an image. Depending on the quality score, the scene detection module may output a quality-aware scale factor that can be applied to reduce pixel resolution of an image before displaying the image to a user. Resultingly, the computing device may be improved by saving system resources including memory bandwidth, processing power for other apps or instances, without negatively affecting visual perception of the scene.

    Structure and formation method of chip package structure

    公开(公告)号:US10354974B2

    公开(公告)日:2019-07-16

    申请号:US14736684

    申请日:2015-06-11

    Applicant: MediaTek Inc.

    Abstract: A chip package structure and a method for forming a chip package are provided. The chip package structure includes a first package which includes at least a semiconductor die, a dielectric structure surrounding the semiconductor die, and a plurality of conductive structures penetrating through the dielectric structure and surrounding the semiconductor die. The package structure also includes an interposer substrate over the first package and a plurality of conductive features in or over the interposer substrate. The package structure further includes a second package over the interposer substrate, and the first package electrically couples the second package through the conductive structures and the conductive features.

    FRAME DIFFERENCE GENERATION HARDWARE IN A GRAPHICS SYSTEM

    公开(公告)号:US20180174359A1

    公开(公告)日:2018-06-21

    申请号:US15379529

    申请日:2016-12-15

    Applicant: MediaTek Inc.

    Abstract: A graphics system provides frame difference generator hardware for dynamically adjusting a frame rate. The graphics system includes a graphics processing unit (GPU), which generates frames containing tiles of graphics data. The frame difference generator hardware receives the graphics data of a tile of a current frame from the GPU, in parallel with a frame buffer that also receives the graphics data. The frame difference generator hardware computes a difference value between a first value computed from the graphics data and a second value representing a corresponding tile of a previous frame, and accumulates difference values computed from multiple tiles of the current frame and the previous frame to obtain an accumulated value. The accumulated value is reported to software executed by the graphics system for determination of an adjustment to the frame rate.

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