公开(公告)号：US20170194227A1

公开(公告)日：2017-07-06

申请号：US15342138

申请日：2016-11-03

Applicant: MEDIATEK Inc.

Inventor： Wen-Sung Hsu ,  Shih-Chin Lin ,  Ming-Jen Hsiung

IPC: H01L23/31 ,  H01L21/56 ,  H01L23/00 ,  H01L21/78 ,  H01L23/498 ,  H01L25/065 ,  H01L21/304

CPC classification number: H01L23/3128 ,  H01L21/304 ,  H01L21/56 ,  H01L21/78 ,  H01L23/3135 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/562 ,  H01L24/13 ,  H01L24/16 ,  H01L24/48 ,  H01L24/94 ,  H01L25/0657 ,  H01L2224/131 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/48229 ,  H01L2224/73153 ,  H01L2224/94 ,  H01L2225/06517 ,  H01L2225/06548 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/1436 ,  H01L2924/15311 ,  H01L2924/15321 ,  H01L2924/1533 ,  H01L2924/15331 ,  H01L2924/1815 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/3512 ,  H01L2224/11 ,  H01L2924/014 ,  H01L2224/27 ,  H01L2224/45099

Abstract: A semiconductor package includes a substrate, a first electronic component, a film and a package body. The first electronic component is disposed on the substrate and has an upper surface. The film is disposed on the upper surface of the first electronic component. The package body encapsulates the first electronic component and the film.

公开(公告)号：US10998267B2

公开(公告)日：2021-05-04

申请号：US15286844

申请日：2016-10-06

Applicant: MediaTek Inc.

Inventor： Yan-Liang Ji ,  Ming-Jen Hsiung

IPC: H01L23/528 ,  H01L23/48 ,  H01L23/00 ,  H01L23/31

Abstract: A wafer-level chip-size package includes a semiconductor structure. A bonding pad is formed over the semiconductor structure, including a plurality of conductive segments. A conductive component is formed over the semiconductor structure, being adjacent to the bonding pad. A passivation layer is formed, exposing a portions of the conductive segments of the first bonding pad. A conductive redistribution layer is formed over the portions of the conductive segments of the first bonding pad exposed by the passivation layer. A planarization layer is formed over the passivation layer and the conductive redistribution layer, exposing a portion of the conductive redistribution layer. A UBM layer is formed over the planarization layer and the portion of the conductive redistribution layer exposed by the planarization layer. A conductive bump is formed over the UBM layer.

公开(公告)号：US10242927B2

公开(公告)日：2019-03-26

申请号：US15342138

申请日：2016-11-03

Applicant: MEDIATEK Inc.

Inventor： Wen-Sung Hsu ,  Shih-Chin Lin ,  Ming-Jen Hsiung

IPC: H01L23/31 ,  H01L25/065 ,  H01L21/56 ,  H01L21/304 ,  H01L21/78 ,  H01L23/498 ,  H01L23/00

Abstract: A semiconductor package includes a substrate, a first electronic component, a film and a package body. The first electronic component is disposed on the substrate and has an upper surface. The film is disposed on the upper surface of the first electronic component. The package body encapsulates the first electronic component and the film.

公开(公告)号：US09953954B2

公开(公告)日：2018-04-24

申请号：US15274506

申请日：2016-09-23

Applicant: MediaTek Inc.

Inventor： Yan-Liang Ji ,  Ming-Jen Hsiung

IPC: H01L23/52 ,  H01L23/00

CPC classification number: H01L24/94 ,  H01L23/3114 ,  H01L23/3192 ,  H01L24/02 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/0214 ,  H01L2224/02145 ,  H01L2224/02166 ,  H01L2224/02181 ,  H01L2224/0235 ,  H01L2224/02351 ,  H01L2224/0236 ,  H01L2224/02371 ,  H01L2224/02381 ,  H01L2224/03452 ,  H01L2224/03462 ,  H01L2224/0401 ,  H01L2224/05008 ,  H01L2224/05022 ,  H01L2224/05082 ,  H01L2224/05094 ,  H01L2224/05096 ,  H01L2224/05569 ,  H01L2224/05572 ,  H01L2224/12105 ,  H01L2224/13024 ,  H01L2224/13027 ,  H01L2224/131 ,  H01L2224/94 ,  H01L2224/11 ,  H01L2224/03 ,  H01L2924/00014 ,  H01L2924/014

Abstract: A Wafer-level chip scale package (WLCSP) includes a semiconductor structure and a first bonding pad formed over a portion of the semiconductor structure. The WLCSP further includes a passivation layer formed over the semiconductor structure and the first bonding pad, exposing portions of the first bonding pad. The WLCSP further includes a conductive redistribution layer formed over the passivation layer and the portions of the first bonding pad exposed by the passivation layer. The WLCSP further includes a planarization layer formed over the passivation layer and the conductive redistribution layer, exposing a portion of the conductive redistribution layer. The WLCSP further includes an under-bump-metallurgy (UBM) layer formed over the planarization layer and a conductive bump formed over the UBM layer.