Abstract:
A memory system for a network device is described. The memory system includes a main memory configured to store one or more data elements. Further, the memory system includes a link memory that is configured to maintain one or more pointers to interconnect the one or more data elements stored in the main memory. The memory system also includes a free-entry manager that is configured to generate an available bank set including one or more locations in the link memory. In addition, the memory system includes a context manager that is configured to maintain metadata for a list of the one or more data elements.
Abstract:
A memory system for a network device is described. The memory system includes a main memory configured to store one or more data elements. Further, the memory system includes a link memory that is configured to maintain one or more pointers to interconnect the one or more data elements stored in the main memory. The memory system also includes a free-entry manager that is configured to generate an available bank set including one or more locations in the link memory. In addition, the memory system includes a context manager that is configured to maintain metadata for a list of the one or more data elements.
Abstract:
A memory system for a network device is described. The memory system includes a main memory configured to store one or more data elements. Further, the memory system includes a link memory that is configured to maintain one or more pointers to interconnect the one or more data elements stored in the main memory. The memory system also includes a free-entry manager that is configured to generate an available bank set including one or more locations in the link memory. In addition, the memory system includes a context manager that is configured to maintain metadata for a list of the one or more data elements.
Abstract:
A modular system for acquiring biometric data includes a plurality of data acquisition modules configured to sample biometric data from at least one respective input channel at a data acquisition rate. A representation of the sampled biometric data is stored in memory of each of the plurality of data acquisition modules. A central control system is in communication with each of the plurality of data acquisition modules through a bus. The central control system is configured to control communication of data, via the bus, with each of the plurality of data acquisition modules.
Abstract:
A method, system, and computer program product to verify management of real storage via multi-threaded thrashers in multiple address spaces are described. The method includes dynamically scaling a number of units of work and a number of address spaces based on a number of available processors and dynamically scaling an amount and page size of storage pages representing virtual storage accessed by each of the number of units of work based on a total available memory. The method also includes obtaining, at each of the units of work, different types of storage frame sizes and attributes, accessing the storage pages corresponding with the respective different types of storage frame sizes and attributes and performing a respective function, and verifying, for each of the units of work performing the respective function, a location of the storage pages and content of the storage pages based on the respective function.
Abstract:
Methods of operating a memory include performing a memory access operation, obtaining an address corresponding to a subsequent memory access operation prior to stopping the memory access operation, stopping the memory access operation, sharing charge between access lines used for the memory access operation and access lines to be used for the subsequent memory access operation, and performing the subsequent memory access operation.
Abstract:
A method, system, and computer program product to verify management of real storage via multi-threaded thrashers in multiple address spaces are described. The method includes dynamically scaling a number of units of work and a number of address spaces based on a number of available processors and dynamically scaling an amount and page size of storage pages representing virtual storage accessed by each of the number of units of work based on a total available memory. The method also includes obtaining, at each of the units of work, different types of storage frame sizes and attributes, accessing the storage pages corresponding with the respective different types of storage frame sizes and attributes and performing a respective function, and verifying, for each of the units of work performing the respective function, a location of the storage pages and content of the storage pages based on the respective function.
Abstract:
A region descriptor management method and an electronic apparatus are provided. The region descriptor management method is adapted to a device controller of the electronic apparatus and includes following steps. Region descriptor entries are fetched from a region descriptor table. Each of the region descriptor entries includes a block initial address and a block length to describe a memory block of a memory module. According to the block initial addresses and the block lengths of the region descriptor entries, a portion of the region descriptor entries are adjusted to be at least one current region descriptor entry. Based on the at least one current region descriptor entry, a current region descriptor table is generated.
Abstract:
A system and a method for managing an expansion read-only memory (ROM), and a management host thereof are provided. The management host is connected with a computer host through a bridge. The management host establishes an address lookup table to assign a virtual function and an expansion ROM corresponding to the virtual function. When a request is issued by the computer host to obtain a size of the expansion ROM, the management host provides data in a shadow register block corresponding to the expansion ROM to the computer host according to the address lookup table. The computer host assigns a memory block in the computer host to the expansion ROM according to the data in the shadow register block. When a request is issued by the computer host to obtain data of the expansion ROM through the bridge, the management host provides the data of the expansion ROM to the computer host according to the memory block.
Abstract:
The various embodiments include methods and apparatuses for providing multiple memories on a multi-slot communication device or on a multi-slot communication device and a wireless device as a single, contiguous, combined memory. The memories may include various types of universal serial bus (USB) and/or universal integrated circuit card (UICC) memories. Ranges of physical addresses of portions of each memory may be associated with a range of virtual addresses of the combined memory. The associations of physical and virtual addresses may be stored on the multi-slot communication device. A single memory access request to the combined memory may be made using the virtual addresses, then translated into multiple memory access requests for the individual memories using the physical addresses. Providing memory access requests to a memory on the wireless device may be accomplished by connecting to the memory on the wireless device over a wireless network by the multi-slot communication device.