Network switch with integrated gradient aggregation for distributed machine learning

    公开(公告)号:US12236323B1

    公开(公告)日:2025-02-25

    申请号:US18217483

    申请日:2023-06-30

    Applicant: Innovium, Inc.

    Abstract: Distributed machine learning systems and other distributed computing systems are improved by embedding compute logic at the network switch level to perform collective actions, such as reduction operations, on gradients or other data processed by the nodes of the system. The switch is configured to recognize data units that carry data associated with a collective action that needs to be performed by the distributed system, referred to herein as “compute data,” and process that data using a compute subsystem within the switch. The compute subsystem includes a compute engine that is configured to perform various operations on the compute data, such as “reduction” operations, and forward the results back to the compute nodes. The reduction operations may include, for instance, summation, averaging, bitwise operations, and so forth. In this manner, the network switch may take over some or all of the processing of the distributed system during the collective phase.

    AUTOMATIC FLOW MANAGEMENT
    2.
    发明申请

    公开(公告)号:US20240422104A1

    公开(公告)日:2024-12-19

    申请号:US18823281

    申请日:2024-09-03

    Applicant: Innovium, Inc.

    Abstract: Packet-switching operations in a network device are managed based on the detection of excessive-rate traffic flows. A network device receives a data unit, determines the traffic flow to which the data unit belongs, and updates flow tracking information for that flow. The network device utilizes the tracking information to determine when a rate at which the network device is receiving data belonging to the flow exceeds an excessive-rate threshold and is thus an excessive-rate flow. The network device may enable one or more excessive-rate policies on an excessive-rate traffic flow. Such a policy may include any number of features that affect how the device handles data units belonging to the flow, such as excessive-rate notification, differentiated discard, differentiated congestion notification, and reprioritization. Memory and other resource optimizations for such flow tracking and management are also described.

    Shared traffic manager
    3.
    发明授权

    公开(公告)号:US12068972B1

    公开(公告)日:2024-08-20

    申请号:US18208648

    申请日:2023-06-12

    Applicant: Innovium, Inc.

    CPC classification number: H04L47/6255 H04L49/901 H04L49/9084

    Abstract: A traffic manager is shared amongst two or more egress blocks of a network device, thereby allowing traffic management resources to be shared between the egress blocks. Schedulers within a traffic manager may generate and queue read instructions for reading buffered portions of data units that are ready to be sent to the egress blocks. The traffic manager may be configured to select a read instruction for a given buffer bank from the read instruction queues based on a scoring mechanism or other selection logic. To avoid sending too much data to an egress block during a given time slot, once a data unit portion has been read from the buffer, it may be temporarily stored in a shallow read data cache. Alternatively, a single, non-bank specific controller may determine all of the read instructions and write operations that should be executed in a given time slot.

    Efficient buffer utilization for network data units

    公开(公告)号:US11949601B1

    公开(公告)日:2024-04-02

    申请号:US17942676

    申请日:2022-09-12

    Applicant: Innovium, Inc.

    CPC classification number: H04L47/786 H04L45/74 H04L47/30 H04L47/41

    Abstract: Approaches, techniques, and mechanisms are disclosed for efficiently buffering data units within a network device. A traffic manager or other network device component receives Transport Data Units (“TDUs”), which are sub-portions of Protocol Data Units (“PDUs”). Rather than buffer an entire TDU together, the component divides the TDU into multiple Storage Data Units (“SDUs”) that can fit in SDU buffer entries within physical memory banks. A TDU-to-SDU Mapping (“TSM”) memory stores TSM lists that indicate which SDU entries store SDUs for a given TDU. Physical memory banks in which the SDUs are stored may be grouped together into logical SDU banks that are accessed together as if a single bank. The TSM memory may include a number of distinct TSM banks, with each logical SDU bank having a corresponding TSM bank. Techniques for maintaining inter-packet and intra-packet linking data compatible with such buffers are also disclosed.

    Reconfigurable circuit devices
    5.
    发明授权

    公开(公告)号:US11924966B1

    公开(公告)日:2024-03-05

    申请号:US17402425

    申请日:2021-08-13

    Applicant: Innovium, Inc.

    Abstract: Loss reduction methods are described. A first transmission loss associated with signal transmission through a trace in a first circuit board design is determined. The trace is routed from an integrated circuit disposed on a circuit board to a circuit element disposed on the circuit board. It is determined that the first transmission loss is greater than a threshold transmission loss. The first circuit board design is altered to obtain a second circuit board design. In the second circuit board design, the trace is routed from the integrated circuit to a connector disposed on the circuit board, and the connector is electrically coupled to the circuit element by a cable. A second transmission loss associated with signal transmission between the integrated circuit and the circuit element in the second circuit board design is less than the threshold transmission loss.

    DELAY-BASED AUTOMATIC QUEUE MANAGEMENT AND TAIL DROP

    公开(公告)号:US20240039852A1

    公开(公告)日:2024-02-01

    申请号:US18378522

    申请日:2023-10-10

    Applicant: Innovium, Inc.

    CPC classification number: H04L47/20 H04L43/0858 H04L47/568 H04L47/32

    Abstract: Approaches, techniques, and mechanisms are disclosed for improving operations of a network switching device and/or network-at-large by utilizing queue delay as a basis for measuring congestion for the purposes of Automated Queue Management (“AQM”) and/or other congestion-based policies. Queue delay is an exact or approximate measure of the amount of time a data unit waits at a network device as a consequence of queuing, such as the amount of time the data unit spends in an egress queue while the data unit is being buffered by a traffic manager. Queue delay may be used as a substitute for queue size in existing AQM, Weighted Random Early Detection (“WRED”), Tail Drop, Explicit Congestion Notification (“ECN”), reflection, and/or other congestion management or notification algorithms. Or, a congestion score calculated based on the queue delay and one or more other metrics, such as queue size, may be used as a substitute.

    Foldable ingress buffer for network apparatuses

    公开(公告)号:US11888691B1

    公开(公告)日:2024-01-30

    申请号:US16933264

    申请日:2020-07-20

    Applicant: Innovium, Inc.

    Inventor: Ajit Kumar Jain

    CPC classification number: H04L41/0823 G11C7/1006 H04L41/12

    Abstract: A network device implements a foldable ingress buffer for buffering data units as they are being received. The buffer is organized into a grid of memory banks, having different columns and rows. A Transport Data Unit (“TDU”) is stored interleaved across entries in multiple banks. As each portion of a TDU is received, the portion is written to a different bank of the buffer. In each column of the buffer, a full-sized TDU has portions in a number of rows equal to the number of folds in the buffer. The sum of the bank widths for each row thus needs be no larger than half the maximum TDU size, which further means that the number of columns in the grid of banks may be reduced by at least half compared to non-folded approaches, with little increase in the number of rows, if any, depending on blocking and reading requirements.

    Distributed artificial intelligence extension modules for network switches

    公开(公告)号:US11516149B1

    公开(公告)日:2022-11-29

    申请号:US17367331

    申请日:2021-07-03

    Applicant: Innovium, Inc.

    Abstract: Distributed machine learning systems and other distributed computing systems are improved by compute logic embedded in extension modules coupled directly to network switches. The compute logic performs collective actions, such as reduction operations, on gradients or other compute data processed by the nodes of the system. The reduction operations may include, for instance, summation, averaging, bitwise operations, and so forth. In this manner, the extension modules may take over some or all of the processing of the distributed system during the collective phase. An inline version of the module sits between a switch and the network. Data units carrying compute data are intercepted and processed using the compute logic, while other data units pass through the module transparently to or from the switch. Multiple modules may be connected to the switch, each coupled to a different group of nodes, and sharing intermediate results. A sidecar version is also described.

    Distributed artificial intelligence extension modules for network switches

    公开(公告)号:US11057318B1

    公开(公告)日:2021-07-06

    申请号:US16552938

    申请日:2019-08-27

    Applicant: Innovium, Inc.

    Abstract: Distributed machine learning systems and other distributed computing systems are improved by compute logic embedded in extension modules coupled directly to network switches. The compute logic performs collective actions, such as reduction operations, on gradients or other compute data processed by the nodes of the system. The reduction operations may include, for instance, summation, averaging, bitwise operations, and so forth. In this manner, the extension modules may take over some or all of the processing of the distributed system during the collective phase. An inline version of the module sits between a switch and the network. Data units carrying compute data are intercepted and processed using the compute logic, while other data units pass through the module transparently to or from the switch. Multiple modules may be connected to the switch, each coupled to a different group of nodes, and sharing intermediate results. A sidecar version is also described.

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