公开(公告)号：US20220301858A1

公开(公告)日：2022-09-22

申请号：US17205847

申请日：2021-03-18

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Cheng-Wei Chang ,  Min-Hsiu Hung ,  Chun-I Tsai ,  Ken-Yu Chang ,  Yi-Ying Liu

IPC: H01L21/02 ,  H01L21/768

Abstract: A method of forming a semiconductor device includes forming a first conductive feature on a bottom surface of an opening through a dielectric layer. The forming the first conductive feature leaves seeds on sidewalls of the opening. A treatment process is performed on the seeds to form treated seeds. The treated seeds are removed with a cleaning process. The cleaning process may include a rinse with deionized water. A second conductive feature is formed to fill the opening.

公开(公告)号：US10971396B2

公开(公告)日：2021-04-06

申请号：US16203918

申请日：2018-11-29

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yu Shih Wang ,  Chun-I Tsai ,  Shian Wei Mao ,  Ken-Yu Chang ,  Ming-Hsing Tsai ,  Wei-Jung Lin

IPC: H01L23/48 ,  H01L21/768 ,  H01L23/532 ,  H01L21/3213 ,  H01L23/485

Abstract: Generally, the present disclosure provides example embodiments relating to conductive features, such as metal contacts, vias, lines, etc., and methods for forming those conductive features. In an embodiment, a barrier layer is formed along a sidewall. A portion of the barrier layer along the sidewall is etched back. After etching back the portion of the barrier layer, an upper portion of the barrier layer along the sidewall is smoothed. A conductive material is formed along the barrier layer and over the smoothed upper portion of the barrier layer.

公开(公告)号：US10964590B2

公开(公告)日：2021-03-30

申请号：US15967056

申请日：2018-04-30

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Tien-Pei Chou ,  Ken-Yu Chang ,  Sheng-Hsuan Lin ,  Yueh-Ching Pai ,  Yu-Ting Lin

IPC: H01L21/768 ,  H01L21/285 ,  H01L23/52 ,  H01L29/40

Abstract: The present disclosure describes a method to a metallization process with improved gap fill properties. The method includes forming a contact opening in an oxide, forming a barrier layer in the contact opening, forming a liner layer on the barrier layer, and forming a first metal layer on the liner layer to partially fill the contact opening. The method further includes forming a second metal layer on the first metal layer to fill the contact opening, where forming the second metal layer includes sputter depositing the second metal layer with a first radio frequency (RF) power and a direct current power, as well as reflowing the second metal layer with a second RF power.

公开(公告)号：US20240213016A1

公开(公告)日：2024-06-27

申请号：US18598322

申请日：2024-03-07

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Cheng-Wei Chang ,  Min-Hsiu Hung ,  Chun-I Tsai ,  Ken-Yu Chang ,  Yi-Ying Liu

IPC: H01L21/02 ,  H01L21/768

CPC classification number: H01L21/02068 ,  H01L21/76871 ,  H01L21/76877

Abstract: A method of forming a semiconductor device includes forming a first conductive feature on a bottom surface of an opening through a dielectric layer. The forming the first conductive feature leaves seeds on sidewalls of the opening. A treatment process is performed on the seeds to form treated seeds. The treated seeds are removed with a cleaning process. The cleaning process may include a rinse with deionized water. A second conductive feature is formed to fill the opening.

公开(公告)号：US20230386913A1

公开(公告)日：2023-11-30

申请号：US18361770

申请日：2023-07-28

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Cheng-Wei Chang ,  Yu-Ming Huang ,  Ethan Tseng ,  Ken-Yu Chang ,  Yi-Ying Liu

IPC: H01L21/768 ,  H01L21/02 ,  H01L21/285 ,  H01L29/04 ,  H01L29/08 ,  H01L29/161 ,  H01L29/417 ,  H01L29/45 ,  H01L29/66 ,  H01L29/78

CPC classification number: H01L21/76856 ,  H01L21/02068 ,  H01L21/28518 ,  H01L21/76805 ,  H01L21/76843 ,  H01L21/76895 ,  H01L29/045 ,  H01L29/0847 ,  H01L29/161 ,  H01L29/41791 ,  H01L29/45 ,  H01L29/66795 ,  H01L29/7851

Abstract: A semiconductor device includes a substrate, two semiconductor fins protruding from the substrate, an epitaxial feature over the two semiconductor fins and connected to the two semiconductor fins, a silicide layer over the epitaxial feature, a barrier layer over the silicide layer, and a metal layer over the barrier layer. The barrier layer includes a metal nitride. Along a boundary between the barrier layer and the metal layer, an atomic ratio of oxygen to metal nitride is about 0.15 to about 1.0.

公开(公告)号：US20230369109A1

公开(公告)日：2023-11-16

申请号：US18359036

申请日：2023-07-26

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yu Shih Wang ,  Chun-I Tsai ,  Shian Wei Mao ,  Ken-Yu Chang ,  Ming-Hsing Tsai ,  Wei-Jung Lin

IPC: H01L21/768 ,  H01L23/532 ,  H01L21/3213 ,  H01L23/485

CPC classification number: H01L21/76847 ,  H01L21/32134 ,  H01L21/76846 ,  H01L23/485 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53252 ,  H01L23/53266

Abstract: Generally, the present disclosure provides example embodiments relating to conductive features, such as metal contacts, vias, lines, etc., and methods for forming those conductive features. In an embodiment, a barrier layer is formed along a sidewall. A portion of the barrier layer along the sidewall is etched back. After etching back the portion of the barrier layer, an upper portion of the barrier layer along the sidewall is smoothed. A conductive material is formed along the barrier layer and over the smoothed upper portion of the barrier layer.

公开(公告)号：US20230268173A1

公开(公告)日：2023-08-24

申请号：US18309298

申请日：2023-04-28

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Cheng-Wei Chang ,  Min-Hsiu Hung ,  Chun-I Tsai ,  Ken-Yu Chang ,  Yi-Ying Liu

IPC: H01L21/02 ,  H01L21/768

CPC classification number: H01L21/02068 ,  H01L21/76877

Abstract: A method of forming a semiconductor device includes forming a first conductive feature on a bottom surface of an opening through a dielectric layer. The forming the first conductive feature leaves seeds on sidewalls of the opening. A treatment process is performed on the seeds to form treated seeds. The treated seeds are removed with a cleaning process. The cleaning process may include a rinse with deionized water. A second conductive feature is formed to fill the opening.

公开(公告)号：US11676859B2

公开(公告)日：2023-06-13

申请号：US17372671

申请日：2021-07-12

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Ken-Yu Chang ,  Chun-I Tsai ,  Ming-Hsing Tsai ,  Wei-Jung Lin

IPC: H01L21/768 ,  H01L29/66 ,  H01L21/8234 ,  H01L21/67

CPC classification number: H01L21/76846 ,  H01L21/67075 ,  H01L21/76877 ,  H01L21/823418 ,  H01L21/823475 ,  H01L29/66545

Abstract: Generally, the present disclosure provides example embodiments relating to conductive features, such as metal contacts, vias, lines, etc., and methods for forming those conductive features. In an embodiment, a barrier layer is formed along a sidewall. A portion of the barrier layer along the sidewall is etched back by a wet etching process. After etching back the portion of the barrier layer, an underlying dielectric welding layer is exposed. A conductive material is formed along the barrier layer.

公开(公告)号：US20220189825A1

公开(公告)日：2022-06-16

申请号：US17676638

申请日：2022-02-21

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Cheng-Wei Chang ,  Yu-Ming Huang ,  Ethan Tseng ,  Ken-Yu Chang ,  Yi-Ying Liu

IPC: H01L21/768 ,  H01L21/02 ,  H01L21/285 ,  H01L29/04 ,  H01L29/08 ,  H01L29/161 ,  H01L29/417 ,  H01L29/45 ,  H01L29/66 ,  H01L29/78

Abstract: A semiconductor device includes a substrate, two semiconductor fins protruding from the substrate, an epitaxial feature over the two semiconductor fins and connected to the two semiconductor fins, a silicide layer over the epitaxial feature, a barrier layer over the silicide layer, and a metal layer over the barrier layer. The barrier layer includes a metal nitride. Along a boundary between the barrier layer and the metal layer, an atomic ratio of oxygen to metal nitride is about 0.15 to about 1.0.

公开(公告)号：US20210358804A1

公开(公告)日：2021-11-18

申请号：US15931111

申请日：2020-05-13

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Cheng-Wei Chang ,  Yu-Ming Huang ,  Ethan Tseng ,  Ken-Yu Chang ,  Yi-Ying Liu

IPC: H01L21/768 ,  H01L29/08 ,  H01L29/04 ,  H01L29/161 ,  H01L29/417 ,  H01L29/45 ,  H01L29/78 ,  H01L21/02 ,  H01L21/285 ,  H01L29/66

Abstract: A method includes providing a structure that includes a semiconductor substrate, an epitaxial source/drain feature over the semiconductor substrate, and one or more dielectric layers over the epitaxial source/drain feature; etching a hole into the one or more dielectric layer to expose a portion of the epitaxial source/drain feature; forming a silicide layer over the portion of the epitaxial source/drain feature; forming a conductive barrier layer over the silicide layer; and applying a plasma cleaning process to at least the conductive barrier layer, wherein the plasma cleaning process uses a gas mixture including N2 gas and H2 gas and is performed at a temperature that is at least 300° C.