Vertical memory device
    24.
    发明授权

    公开(公告)号:US11264401B2

    公开(公告)日:2022-03-01

    申请号:US16270570

    申请日:2019-02-07

    Abstract: A vertical memory device includes a substrate having a peripheral circuit structure, first gate patterns having first gate pad regions stacked vertically from the substrate, vertical channel structures penetrating the first gate patterns, first gate contact structures each extending vertically to a corresponding first gate pad region, mold patterns stacked vertically from the substrate, the mold patterns each being positioned at the same height from the substrate with a corresponding gate pattern, peripheral contact structures penetrating the mold patterns to be connected to the peripheral circuit structure, a first block separation structure disposed between the first gate contact structures and the peripheral contact structures, and a first peripheral circuit connection wiring extending across the first block separation structure to connect one of the first gate contact structures to one of the peripheral contact structures.

    Memory device
    25.
    发明授权

    公开(公告)号:US11004865B2

    公开(公告)日:2021-05-11

    申请号:US16692385

    申请日:2019-11-22

    Abstract: A memory device includes a plurality of gate electrode layers stacked on a substrate, a plurality of channel layers penetrating the plurality of gate electrode layers, a gate insulating layer between the plurality of gate electrode layers and the plurality of channel layers, and a common source line on the substrate adjacent to the gate electrode layers. The common source line includes a first part and a second part that are alternately arranged in a first direction and have different heights in a direction vertical to a top surface of the substrate. The gate insulating layer includes a plurality of vertical parts and a horizontal part. The plurality of vertical parts surrounds corresponding ones of the plurality of channel layers. The horizontal part extends parallel to a top surface of the substrate.

    Apparatus for and method of performing inspection and metrology process

    公开(公告)号:US10732129B2

    公开(公告)日:2020-08-04

    申请号:US16250378

    申请日:2019-01-17

    Abstract: Disclosed are an apparatus for and a method of performing an inspection and metrology process. The apparatus may include a stage configured to load a substrate thereon, a sensor on the stage, an object lens between the sensor and the stage, a light source generating an illumination light to be transmitted to the substrate through the object lens, a first band filtering part between the light source and the object lens to control a wavelength of the illumination light within a first bandwidth, and a second band filtering part between the light source and the object lens to control a wavelength of the illumination light within a second bandwidth, which is smaller than the first bandwidth.

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